| 2020 | DATE | Synthesis and Optimization of Multiple Portions of Circuits for ECO based on Set-Covering and QBF Formulations. | Masahiro Fujita, Yusuke Kimura, Xingming Le, Yukio Miyasaka, Amir Masoud Gharehbaghi |
| 2019 | ISCAS | Signal Selection Methods for Efficient Multi-Target Correction. | Yusuke Kimura, Amir Masoud Gharehbaghi, Masahiro Fujita |
| 2019 | ISCAS | Live Demonstration: Automatic Synthesis of Algorithms on Multi Chip/FPGA with Communication Constraints. | Tomohiro Maruoka, Yukio Miyasaka, Akihiro Goda, Amir Masoud Gharehbaghi, Masahiro Fujita |
| 2019 | ISCAS | High-Level Engineering Change Through Programmable Datapath and SMT Solvers. | Qinhao Wang, Amir Masoud Gharehbaghi, Takeshi Matsumoto, Masahiro Fujita |
| 2019 | VTS | An Incremental Automatic Test Pattern Generation Method for Multiple Stuck-at Faults. | Peikun Wang, Amir Masoud Gharehbaghi, Masahiro Fujita |
| 2017 | ISCAS | A new approach for diagnosing bridging faults in logic designs. | Amir Masoud Gharehbaghi, Masahiro Fujita |
| 2017 | ISCAS | Test pattern generation for multiple stuck-at faults not covered by test patterns for single faults. | Conrad J. Moore, Peikun Wang, Amir Masoud Gharehbaghi, Masahiro Fujita |
| 2017 | ISCAS | A low-cost approximate 32-point transform architecture. | Heming Sun, Zhengxue Cheng, Amir Masoud Gharehbaghi, Shinji Kimura, Masahiro Fujita |
| 2013 | FPGA | Rectification of advanced microprocessors without changing routing on FPGAs (abstract only). | Satoshi Jo, Amir Masoud Gharehbaghi, Takeshi Matsumoto, Masahiro Fujita |
| 2010 | FPGA | Aggressive overclocking support using a novel timing error recovery technique on FPGAs (abstract only). | Amir Masoud Gharehbaghi, Bijan Alizadeh, Masahiro Fujita |
| 2009 | DAC | Debugging from high level down to gate level. | Masahiro Fujita, Yoshihisa Kojima, Amir Masoud Gharehbaghi |
| 2009 | ICCD | Transaction-based debugging of system-on-chips with patterns. | Amir Masoud Gharehbaghi, Masahiro Fujita |
| 2008 | CSICC | System-Level Assertion-Based Performance Verification for Embedded Systems. | Hassan Hatefi-Ardakani, Amir Masoud Gharehbaghi, Shaahin Hessabi |