| 2010 | DAC | SCUD: a fast single-pass L1 cache simulation approach for embedded processors with round-robin replacement policy. | Mohammad Shihabul Haque, Jorgen Peddersen, Andhi Janapsatya, Sri Parameswaran |
| 2010 | DATE | DEW: A fast level 1 cache simulation approach for embedded processors with FIFO replacement policy. | Mohammad Shihabul Haque, Jorgen Peddersen, Andhi Janapsatya, Sri Parameswaran |
| 2010 | DATE | Dueling CLOCK: Adaptive cache replacement policy based on the CLOCK algorithm. | Andhi Janapsatya, Aleksandar Ignjatovic, Jorgen Peddersen, Sri Parameswaran |
| 2010 | DATE | Rapid runtime estimation methods for pipelined MPSoCs. | Haris Javaid, Andhi Janapsatya, Mohammad Shihabul Haque, Sri Parameswaran |
| 2009 | ASPDAC | HitME: low power Hit MEmory buffer for embedded systems. | Andhi Janapsatya, Sri Parameswaran, Aleksandar Ignjatovic |
| 2007 | DATE | Instruction trace compression for rapid instruction cache simulation. | Andhi Janapsatya, Aleksandar Ignjatovic, Sri Parameswaran, Jrg Henkel |
| 2006 | ASPDAC | A novel instruction scratchpad memory optimization method based on concomitance metric. | Andhi Janapsatya, Aleksandar Ignjatovic, Sri Parameswaran |
| 2006 | ASPDAC | Finding optimal L1 cache configuration for embedded systems. | Andhi Janapsatya, Aleksandar Ignjatovic, Sri Parameswaran |
| 2005 | VLSID | Rapid Embedded Hardware/Software System Generation. | Jorgen Peddersen, Seng Lin Shee, Andhi Janapsatya, Sri Parameswaran |
| 2004 | ICCAD | Hardware/software managed scratchpad memory for embedded system. | Andhi Janapsatya, Sri Parameswaran, Aleksandar Ignjatovic |