| 2019 | MICRO | DynaSprint: Microarchitectural Sprints with Dynamic Utility and Thermal Management. | Ziqiang Huang, Jos A. Joao, Alejandro Rico, Andrew D. Hilton, Benjamin C. Lee |
| 2018 | ISPASS | MAPS: Understanding Metadata Access Patterns in Secure Memory. | Tamara Silbergleit Lehman, Andrew D. Hilton, Benjamin C. Lee |
| 2018 | ITiCSE | A technique for translation from problem to code. | Andrew D. Hilton, Genevieve M. Lipp, Susan H. Rodger |
| 2016 | ISCA | Decoupling Loads for Nano-Instruction Set Computers. | Ziqiang Huang, Andrew D. Hilton, Benjamin C. Lee |
| 2016 | MICRO | PoisonIvy: Safe speculation for secure memory. | Tamara Silbergleit Lehman, Andrew D. Hilton, Benjamin C. Lee |
| 2015 | ISPASS | Multi-program benchmark definition. | Adam N. Jacobvitz, Andrew D. Hilton, Daniel J. Sorin |
| 2012 | HPCA | Flexible register management using reference counting. | Steven J. Battle, Andrew D. Hilton, Mark Hempstead, Amir Roth |
| 2010 | HPCA | BOLT: Energy-efficient Out-of-Order Latency-Tolerant execution. | Andrew D. Hilton, Amir Roth |
| 2009 | HPCA | iCFP: Tolerating all-level cache misses in in-order processors. | Andrew D. Hilton, Santosh Nagarakatte, Amir Roth |
| 2009 | ISCA | Decoupled store completion/silent deterministic replay: enabling scalable data memory for CPR/CFP processors. | Andrew D. Hilton, Amir Roth |
| 2007 | ISCA | Ginger: control independence using tag rewriting. | Andrew D. Hilton, Amir Roth |