| 2003 | ASPDAC | Experience in critical path selection for deep sub-micron delay test and timing validation. | Jing-Jia Liou, Li-C. Wang, Angela Krstic, Kwang-Ting Cheng |
| 2003 | DAC | Enhancing diagnosis resolution for delay defects based upon statistical timing and statistical fault models. | Angela Krstic, Li-C. Wang, Kwang-Ting Cheng, Jing-Jia Liou, T. M. Mak |
| 2003 | DATE | Delay Defect Diagnosis Based Upon Statistical Timing Models - The First Step. | Angela Krstic, Li-C. Wang, Kwang-Ting Cheng, Jing-Jia Liou, Magdy S. Abadir |
| 2003 | ITC | HyAC: A Hybrid Structural SAT Based ATPG for Crosstalk. | Xiaoliang Bai, Sujit Dey, Angela Krstic |
| 2003 | ITC | Diagnosis-Based Post-Silicon Timing Validation Using Statistical Tools and Methodologies. | Angela Krstic, Li-C. Wang, Kwang-Ting Cheng, T. M. Mak |
| 2003 | ITC | Using Logic Models To Predict The Detection Behavior Of Statistical Timing Defects. | Li-C. Wang, Angela Krstic, Leonard Lee, Kwang-Ting Cheng, M. Ray Mercer, Thomas W. Williams, Magdy S. Abadir |
| 2003 | VTS | Diagnosis of Delay Defects Using Statistical Timing Models. | Angela Krstic, Li-C. Wang, Kwang-Ting Cheng, Jing-Jia Liou |
| 2002 | DAC | Embedded software-based self-testing for SoC design. | Angela Krstic, Wei-Cheng Lai, Kwang-Ting Cheng, Li Chen, Sujit Dey |
| 2002 | DAC | False-path-aware statistical timing analysis and efficient path selection for delay testing and timing validation. | Jing-Jia Liou, Angela Krstic, Li-C. Wang, Kwang-Ting Cheng |
| 2001 | DAC | Fast Statistical Timing Analysis By Probabilistic Event Propagation. | Jing-Jia Liou, Kwang-Ting Cheng, Sandip Kundu, Angela Krstic |
| 2001 | ITC | Delay testing considering crosstalk-induced effects. | Angela Krstic, Jing-Jia Liou, Yi-Min Jiang, Kwang-Ting Cheng |
| 2000 | ASPDAC | Performance sensitivity analysis using statistical method and its applications to delay. | Jing-Jia Liou, Angela Krstic, Kwang-Ting Cheng, Deb Aditya Mukherjee, Sandip Kundu |
| 2000 | ICCAD | Path Selection and Pattern Generation for Dynamic Timing Analysis Considering Power Supply Noise Effects. | Jing-Jia Liou, Angela Krstic, Yi-Min Jiang, Kwang-Ting Cheng |
| 2000 | ITC | Test program synthesis for path delay faults in microprocessor cores. | Wei-Cheng Lai, Angela Krstic, Kwang-Ting Cheng |
| 2000 | VTS | On Testing the Path Delay Faults of a Microprocessor Using its Instruction Set. | Wei-Cheng Lai, Angela Krstic, Kwang-Ting Cheng |
| 1999 | ITC | Delay testing considering power supply noise effects. | Yi-Min Jiang, Angela Krstic, Kwang-Ting Cheng |
| 1999 | VTS | Testing High Speed VLSI Devices Using Slower Testers. | Angela Krstic, Kwang-Ting (Tim) Cheng, Srimat T. Chakradhar |
| 1997 | DAC | Post-Layout Logic Restructuring for Performance Optimization. | Yi-Min Jiang, Angela Krstic, Kwang-Ting Cheng, Malgorzata Marek-Sadowska |
| 1997 | DAC | Vector Generation for Maximum Instantaneous Current Through Supply Lines for CMOS Circuits. | Angela Krstic, Kwang-Ting Cheng |
| 1997 | ITC | Design for Primitive Delay Fault Testability. | Angela Krstic, Kwang-Ting Cheng, Srimat T. Chakradhar |
| 1996 | DATE | Resynthesis of Combinational Circuts for Path Count Reduction and for Path Delay Fault Testability. | Angela Krstic, Kwang-Ting Cheng |
| 1996 | ITC | Identification and Test Generation for Primitive Faults. | Angela Krstic, Kwang-Ting Cheng, Srimat T. Chakradhar |
| 1995 | VTS | Generation of high quality tests for functional sensitizable paths. | Angela Krstic, Kwang-Ting Cheng |