| 2008 | DAC | Reinventing EDA with manycore processors. | Sachin S. Sapatnekar, Eshel Haritan, Kurt Keutzer, Anirudh Devgan, Desmond Kirkpatrick, Stephen Meier, Duaine Pryor, Tom Spyrou |
| 2006 | ASPDAC | Robust analytical gate delay modeling for low voltage circuits. | Anand Ramalingam, Sreekumar V. Kodakara, Anirudh Devgan, David Z. Pan |
| 2005 | ASPDAC | Achieving continuous V | Kanak Agarwal, Dennis Sylvester, David T. Blaauw, Anirudh Devgan |
| 2005 | ASPDAC | Leakage power: trends, analysis and avoidance. | David T. Blaauw, Anirudh Devgan, Farid N. Najm |
| 2005 | ASPDAC | Sleep transistor sizing using timing criticality and temporal currents. | Anand Ramalingam, Bin Zhang, Anirudh Devgan, David Z. Pan |
| 2005 | DAC | Spatially distributed 3D circuit models. | Michael W. Beattie, Hui Zheng, Anirudh Devgan, Byron Krauter |
| 2005 | DAC | An efficient algorithm for statistical minimization of total power under timing yield constraints. | Murari Mani, Anirudh Devgan, Michael Orshansky |
| 2005 | ISLPED | Power grid voltage integrity verification. | Maha Nizam, Farid N. Najm, Anirudh Devgan |
| 2005 | VLSID | Power Variability and Its Impact on Design. | Anirudh Devgan, Sani R. Nassif |
| 2004 | DAC | Parametric yield estimation considering leakage variability. | Rajeev R. Rao, Anirudh Devgan, David T. Blaauw, Dennis Sylvester |
| 2003 | DAC | Delay and slew metrics using the lognormal distribution. | Charles J. Alpert, Frank Liu, Chandramouli V. Kashyap, Anirudh Devgan |
| 2003 | ICCAD | Block-based Static Timing Analysis with Uncertainty. | Anirudh Devgan, Chandramouli V. Kashyap |
| 2003 | ICCAD | Circuit Simulation of Nanotechnology Devices with Non-monotonic I-V Characteristics. | Jiayong Le, Lawrence T. Pileggi, Anirudh Devgan |
| 2003 | ISLPED | Leakage and leakage sensitivity computation for combinational circuits. | Emrah Acar, Anirudh Devgan, Rahul M. Rao, Ying Liu, Haihua Su, Sani R. Nassif, Jeffrey L. Burns |
| 2003 | ISLPED | Efficient techniques for gate leakage estimation. | Rahul M. Rao, Jeffrey L. Burns, Anirudh Devgan, Richard B. Brown |
| 2003 | ISLPED | Full chip leakage estimation considering power supply and temperature variations. | Haihua Su, Frank Liu, Anirudh Devgan, Emrah Acar, Sani R. Nassif |
| 2001 | ASPDAC | KSim: a stable and efficient RKC simulator for capturing on-chip inductance effect. | Hao Ji, Anirudh Devgan, Wayne Wei-Ming Dai |
| 2000 | ICCAD | How to Efficiently Capture On-Chip Inductance Effects: Introducing a New Circuit Element K. | Anirudh Devgan, Hao Ji, Wayne Wei-Ming Dai |
| 2000 | ICCAD | An "Effective" Capacitance Based Delay Metric for RC Interconnect. | Chandramouli V. Kashyap, Charles J. Alpert, Anirudh Devgan |
| 1999 | DAC | Buffer Insertion with Accurate Gate and Interconnect Delay Computation. | Charles J. Alpert, Anirudh Devgan, Stephen T. Quay |
| 1999 | ICCAD | Is wire tapering worthwhile? | Charles J. Alpert, Anirudh Devgan, Stephen T. Quay |
| 1999 | ICCAD | Realizable reduction for RC interconnect circuits. | Anirudh Devgan, Peter R. O'Brien |
| 1998 | ASPDAC | Timing Analysis and Optimization: From Devices to Systems (Abstract of Embedded Tutorial). | Anirudh Devgan, Sandip Kundu |
| 1998 | DAC | Buffer Insertion for Noise and Delay Optimization. | Charles J. Alpert, Anirudh Devgan, Stephen T. Quay |
| 1998 | DAC | Adjoint Transient Sensitivity Computation in Piecewise Linear Simulation. | Tuyen V. Nguyen, Anirudh Devgan, Ognen J. Nastov |
| 1998 | ICCAD | Simulation of coupling capacitances using matrix partitioning. | Tuyen V. Nguyen, Anirudh Devgan, Ali Sadigh |
| 1997 | DAC | Wire Segmenting for Improved Buffer Insertion. | Charles J. Alpert, Anirudh Devgan |
| 1997 | ICCAD | Efficient coupled noise estimation for on-chip interconnects. | Anirudh Devgan |
| 1997 | ICCAD | Timing analysis and optimization: from devices to systems (tutorial). | Anirudh Devgan, Leon Stok, Sandip Kundu |
| 1997 | ICCAD | State transformation in event driven explicit simulation. | Tuyen V. Nguyen, Anirudh Devgan |
| 1995 | ICCAD | Efficient and accurate transient simulation in charge-voltage plane. | Anirudh Devgan |
| 1995 | ICCD | Accurate device modeling techniques for efficient timing simulation of integrated circuits. | Anirudh Devgan |
| 1995 | VLSID | Efficient simulation of interconnect and mixed analog-digital circuits in ACES. | Anirudh Devgan, Ronald A. Rohrer |
| 1993 | ICCAD | Event driven adaptively controlled explicit simulation of integrated circuits. | Anirudh Devgan, Ronald A. Rohrer |
| 1993 | ICCD | ACES: A Transient Simulation Strategy for Integrated Circuits. | Anirudh Devgan, Ronald A. Rohrer |