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Ann Gordon-Ross

Publication record assembled from the DBLP archive of ranked conferences.

Papers indexed

35

Venues

15

Active years

2001–2019

Best venue rank

A*

Where they publish

Papers

35 indexed papers, newest first.

YearVenueTitleAuthors
2019DATEDynamic Scheduling on Heterogeneous Multicores.Ayobami S. Edun, Ruben Vazquez, Ann Gordon-Ross, Greg Stitt
2019ICCDEnergy Prediction for Cache Tuning in Embedded Systems.Ruben Vazquez, Ann Gordon-Ross, Greg Stitt
2016DATEConfiguration prefetching and reuse for preemptive hardware multitasking on partially reconfigurable FPGAs.Aurelio Morales-Villanueva, Rohit Kumar, Ann Gordon-Ross
2014EUCDynamic Scheduling for Reduced Energy in Configuration-Subsetted Heterogeneous Multicore Systems.Mohamad Hammam Alsafrjalani, Ann Gordon-Ross
2014EUCMinimum Effort Design Space Subsetting for Configurable Caches.Mohamad Hammam Alsafrjalani, Ann Gordon-Ross, Pablo Viana
2014IPCCCAnalysis of cache tuner architectural layouts for multicore embedded systems.Tosiron Adegbija, Ann Gordon-Ross, Marisha Rawlins
2013FCCMPRML: A Modeling Language for Rapid Design Exploration of Partially Reconfigurable FPGAs.Rohit Kumar, Ann Gordon-Ross
2013FCCMOn-chip Context Save and Restore of Hardware Tasks on Partially Reconfigurable FPGAs.Aurelio Morales-Villanueva, Ann Gordon-Ross
2013ICCDExploiting dynamic phase distance mapping for phase-based tuning of embedded systems.Tosiron Adegbija, Ann Gordon-Ross
2012ASPDACAn application classification guided cache tuning heuristic for multi-core architectures.Marisha Rawlins, Ann Gordon-Ross
2012ICCDDynamic phase-based tuning for embedded systems using phase distance mapping.Tosiron Adegbija, Ann Gordon-Ross, Arslan Munir
2012IPCCCParallelized benchmark-driven performance evaluation of SMPs and tiled multi-core architectures for embedded systems.Arslan Munir, Ann Gordon-Ross, Sanjay Ranka
2012ISPASSA single-pass cache simulation methodology for two-level unified caches.Wei Zang, Ann Gordon-Ross
2011ASPDACOn the interplay of loop caching, code compression, and cache configuration.Marisha Rawlins, Ann Gordon-Ross
2011ASPDACT-SPaCS - A two-level single-pass cache simulation methodology.Wei Zang, Ann Gordon-Ross
2011ICCCNMarkov Modeling of Fault-Tolerant Wireless Sensor Networks.Arslan Munir, Ann Gordon-Ross
2011ICCDA queueing theoretic approach for performance evaluation of low-power multi-core embedded systems.Arslan Munir, Ann Gordon-Ross, Sanjay Ranka
2011ICCDCPACT - The conditional parameter adjustment cache tuner for dual-core architectures.Marisha Rawlins, Ann Gordon-Ross
2010DATEVAPRES: A Virtual Architecture for Partially Reconfigurable Embedded Systems.Abelardo Jara-Berrocal, Ann Gordon-Ross
2010WiMobA lightweight dynamic optimization methodology for wireless sensor networks.Arslan Munir, Ann Gordon-Ross, Susan Lysecky, Roman L. Lysecky
2009DATEBitstream relocation with local clock domains for partially reconfigurable FPGAs.Adam Flynn, Ann Gordon-Ross, Alan D. George
2009DATESCORES: A scalable and parametric streams-based communication architecture for modular reconfigurable systems.Abelardo Jara-Berrocal, Ann Gordon-Ross
2009FCCMExploiting Partially Reconfigurable FPGAs for Situation-Based Reconfiguration in Wireless Sensor Networks.Rafael Garca, Ann Gordon-Ross, Alan D. George
2009FPLMacs: A Minimal Adaptive routing circuit-switched architecture for scalable and parametric NoCs.Rohit Kumar, Ann Gordon-Ross
2009VLSIDSACR: Scheduling-Aware Cache Reconfiguration for Real-Time Embedded Systems.Weixun Wang, Prabhat Mishra, Ann Gordon-Ross
2008ICCDA resource efficient content inspection system for next generation Smart NICs.Karthik Sabhanatarajan, Ann Gordon-Ross
2008LCNReal-time performance analysis of Adaptive Link Rate.Baoke Zhang, Karthik Sabhanatarajan, Ann Gordon-Ross, Alan D. George
2007DACA Self-Tuning Configurable Cache.Ann Gordon-Ross, Frank Vahid
2007DATEA one-shot configurable-cache tuner for improved energy and performance.Ann Gordon-Ross, Pablo Viana, Frank Vahid, Walid A. Najjar, Edna Barros
2006DACConfigurable cache subsetting for fast cache tuning.Pablo Viana, Ann Gordon-Ross, Eamonn J. Keogh, Edna Barros, Frank Vahid
2005ISLPEDFast configurable-cache tuning with a unified second-level cache.Ann Gordon-Ross, Frank Vahid, Nikil D. Dutt
2004DATEAutomatic Tuning of Two-Level Caches to Embedded Applications.Ann Gordon-Ross, Frank Vahid, Nikil D. Dutt
2003CASESFrequent loop detection using efficient non-intrusive on-chip hardware.Ann Gordon-Ross, Frank Vahid
2002ICCDDynamic Loop Caching Meets Preloaded Loop Caching - A Hybrid Approach.Ann Gordon-Ross, Frank Vahid
2001ISLPEDA self-optimizing embedded microprocessor using a loop table for low power.Frank Vahid, Ann Gordon-Ross