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Annajirao Garimella

Publication record assembled from the DBLP archive of ranked conferences.

Papers indexed

6

Venues

2

Active years

2003–2018

Best venue rank

National

Where they publish

Papers

6 indexed papers, newest first.

YearVenueTitleAuthors
2018VLSIDFlipped Voltage Follower Based Low Dropout (LDO) Voltage Regulators: A Tutorial Overview.Punith R. Surkanti, Annajirao Garimella, Paul M. Furth
2012VLSIDEmbedded Tutorial ET1: Pole-Zero Analysis of Low-Dropout (LDO) Regulators: A Tutorial Overview.Annajirao Garimella, Punith R. Surkanti, Paul M. Furth
2012VLSIDPole-Zero Analysis of Low-Dropout (LDO) Regulators: A Tutorial Overview.Annajirao Garimella, Punith R. Surkanti, Paul M. Furth
2010ISCASSingle Miller compensation using inverting current buffer for multi-stage amplifiers.Annajirao Garimella, M. Wasequr Rashid, Paul M. Furth
2008VLSIDAn Input Stage for the Implementation of Low-Voltage Rail to Rail Offset Compensated CMOS Comparators.Jaime Ramrez-Angulo, Lalitha Mohana Kalyani-Garimella, Annajirao Garimella, Sri Raga Sudha Garimella, Antonio J. Lpez-Martn, Ramn Gonzlez Carvajal
2003VLSIDVLSI Implementation of Online Digital Watermarking Technique with Difference Encoding for 8-Bit Gray Scale Images.Annajirao Garimella, M. V. V. Satyanarayana, R. Satish Kumar, P. S. Murugesh, U. C. Niranjan