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An Input Stage for the Implementation of Low-Voltage Rail to Rail Offset Compensated CMOS Comparators.

Jaime Ramrez-Angulo, Lalitha Mohana Kalyani-Garimella, Annajirao Garimella, Sri Raga Sudha Garimella, Antonio J. Lpez-Martn, Ramn Gonzlez Carvajal

Year2008
ProceedingsVLSI Design

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