Sri Raga Sudha Garimella
Publication record assembled from the DBLP archive of ranked conferences.
Papers indexed
3
Venues
2
Active years
2008–2008
Best venue rank
National
Where they publish
Papers
3 indexed papers, newest first.
| Year | Venue | Title | Authors |
|---|---|---|---|
| 2008 | ISCAS | Design of highly linear multipliers using floating gate transistors and/or source degeneration resistor. | Sri Raga Sudha Garimella, Jaime Ramrez-Angulo, Antonio J. Lpez-Martn, Ramn Gonzlez Carvajal |
| 2008 | VLSID | Highly Linear Wide Dynamic Swing CMOS Transconductance Multiplier Using Source-Degeneration V-I Converters. | Sri Raga Sudha Garimella |
| 2008 | VLSID | An Input Stage for the Implementation of Low-Voltage Rail to Rail Offset Compensated CMOS Comparators. | Jaime Ramrez-Angulo, Lalitha Mohana Kalyani-Garimella, Annajirao Garimella, Sri Raga Sudha Garimella, Antonio J. Lpez-Martn, Ramn Gonzlez Carvajal |