Lalitha Mohana Kalyani-Garimella
Publication record assembled from the DBLP archive of ranked conferences.
Papers indexed
1
Venues
1
Active years
2008–2008
Best venue rank
National
Where they publish
Papers
1 indexed papers, newest first.
| Year | Venue | Title | Authors |
|---|---|---|---|
| 2008 | VLSID | An Input Stage for the Implementation of Low-Voltage Rail to Rail Offset Compensated CMOS Comparators. | Jaime Ramrez-Angulo, Lalitha Mohana Kalyani-Garimella, Annajirao Garimella, Sri Raga Sudha Garimella, Antonio J. Lpez-Martn, Ramn Gonzlez Carvajal |