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Arda Yurdakul

Publication record assembled from the DBLP archive of ranked conferences.

Papers indexed

12

Venues

9

Active years

2000–2023

Best venue rank

C

Where they publish

Papers

12 indexed papers, newest first.

YearVenueTitleAuthors
2023DSDContainer Scheduling Under ARINC 653 Scheduler Constraints.Mehmet Sirin Onen, Arda Yurdakul
2022DSDA Clustering-Based Scoring Mechanism for Malicious Model Detection in Federated Learning.Cem Caglayan, Arda Yurdakul
2020NOMSModel-based Design of a Roadside Unit for Emergency and Disaster Management.Nur Hilal, Arda Yurdakul
2018SmartCompWIP: Daily Life Oriented Indoor Localization by Fusion of Smartphone Sensors and Wi-Fi.Ayse Vildan Nurdag, Bert Arnrich, Arda Yurdakul
2017EMSOFTIntegrating low-power IoT devices to a blockchain-based infrastructure: work-in-progress.Kazim Rifat zyilmaz, Arda Yurdakul
2015EUCExploring Embedded Symmetric Multiprocessing with Various On-Chip Architectures.Gorker Alp Malazgirt, Bora Kiyan, Deniz Candas, Kamil Erdayandi, Arda Yurdakul
2015FPGAAccelerating Complete Decision Support Queries Through High-Level Synthesis Technology (Abstract Only).Gorker Alp Malazgirt, Nehir Snmez, Arda Yurdakul, Osman S. Unsal, Adrin Cristal
2014FPLApplication specific multi-port memory customization in FPGAs.Gorker Alp Malazgirt, Hasan Erdem Yantir, Arda Yurdakul, Smal Niar
2013DSDEfficient Implementations of Multi-pumped Multi-port Register Files in FPGAs.Hasan Erdem Yantir, Salih Bayar, Arda Yurdakul
2012DSDA Verifiable High Level Data Path Synthesis Framework.Gorker Alp Malazgirt, Ender Culha, Alper Sen, I. Faik Baskaya, Arda Yurdakul
2009FDLDesign automation model for application-specific processors on reconfigurable fabric.Bayram Kurumahmut, Gkhan Kabukcu, Roza Ghamari, Arda Yurdakul
2000ISCASA synthesis tool for the multiplierless realization of FIR-based multirate DSP systems.Arda Yurdakul