| 2000 | ASPLOS | MemorIES: A Programmable, Real-Time Hardware Emulation Tool for Multiprocessor Server Design. | Ashwini K. Nanda, Kwok-Ken Mak, Krishnan Sugavanam, Ramendra K. Sahoo, Vijayaraghavan Soundararajan, T. Basil Smith |
| 2000 | HPCA | High-Throughput Coherence Controllers. | Ashwini K. Nanda, Anthony-Trung Nguyen, Maged M. Michael, Douglas J. Joseph |
| 1999 | HPCA | Second Workshop on Computer Architecture Evaluation Using Commercial Workloads. | Russell M. Clapp, Ashwini K. Nanda, Josep Torrellas |
| 1999 | HPCA | Design and Performance of Directory Caches for Scalable Shared Memory Multiprocessors. | Maged M. Michael, Ashwini K. Nanda |
| 1999 | IPCCC | Measurement, analysis and performance improvement of the Apache Web server. | Yiming Hu, Ashwini K. Nanda, Qing Yang |
| 1997 | ISCA | Coherence Controller Architectures for SMP-Based CC-NUMA Multiprocessors. | Maged M. Michael, Ashwini K. Nanda, Beng-Hong Lim, Michael L. Scott |
| 1996 | MICRO | Integrating a Misprediction Recovery Cache (MRC) into a Superscalar Pipeline. | James O. Bondi, Ashwini K. Nanda, Simonjit Dutta |
| 1995 | ISLPED | Energy optimization of multi-level processor cache architectures. | Uming Ko, Poras T. Balsara, Ashwini K. Nanda |
| 1994 | ICPP | Performance and Reliability of the Multistage Bus Network. | Laxmi N. Bhuyan, Ashwini K. Nanda, Tahsin Askar |
| 1992 | ICDCS | Scheduling Directed Task Graphs on Multiprocessors Using Simulated Annealing. | Ashwini K. Nanda, Doug DeGroot, Daniel L. Stenger |
| 1992 | ICPP | A Formal Specification and Verification Technique for Cache Coherence Protocols. | Ashwini K. Nanda, Laxmi N. Bhuyan |
| 1992 | SC | Mapping Applications onto a Cache Coherent Multiprocessor. | Ashwini K. Nanda, Laxmi N. Bhuyan |