Bahram Pouya
Publication record assembled from the DBLP archive of ranked conferences.
Papers indexed
7
Venues
2
Active years
1997–2001
Best venue rank
National
Where they publish
Papers
7 indexed papers, newest first.
| Year | Venue | Title | Authors |
|---|---|---|---|
| 2001 | VTS | Reducing Power Dissipation during Test Using Scan Chain Disable. | Ranganathan Sankaralingam, Nur A. Touba, Bahram Pouya |
| 2000 | ITC | Optimization trade-offs for vector volume and test power. | Bahram Pouya, Alfred L. Crouch |
| 2000 | VTS | Virtual Scan Chains: A Means for Reducing Scan Length in Cores. | Abhijit Jas, Bahram Pouya, Nur A. Touba |
| 1998 | ITC | BETSY: synthesizing circuits for a specified BIST environment. | Zhe Zhao, Bahram Pouya, Nur A. Touba |
| 1998 | VTS | Synthesis of Zero-Aliasing Elementary-Tree Space Compactors. | Bahram Pouya, Nur A. Touba |
| 1997 | ITC | Modifying User-Defined Logic for Test Access to Embedded Cores. | Bahram Pouya, Nur A. Touba |
| 1997 | VTS | Testing Embedded Cores Using Partial Isolation Rings. | Nur A. Touba, Bahram Pouya |