| 2003 | ISCAS | A 5-GHz self-calibrated I/Q clock generator using a quadrature LC-VCO. | Hyung Ki Ahn, In-Cheol Park, Beomsup Kim |
| 2003 | ISCAS | A hybrid delta-sigma modulator with adaptive calibration. | Jae Hoon Shim, In-Cheol Park, Beomsup Kim |
| 2001 | ICASSP | Digital timing synchronization with jitter reduction technique for cap-based VDSL system. | Yongchul Song, Kyehyung Lee, Beomsup Kim |
| 1999 | ASPDAC | 16-bit DSP and System for Baseband / Voiceband Processing of IS-136 Cellular Telephony. | Tae Hun Kim, Jeongsik Yang, Kyoo Hyun Lim, Jin Wook Kim, Jeong Eun Lee, Hyoung Sik Nam, Young Gon Kim, Jeong Pyo Kim, Sangjin Byun, Bae Sung Kwon, Beomsup Kim |
| 1998 | ASPDAC | Dual-loop Digital PLL Design for Adaptive Clock Recovery. | Tae Hun Kim, Beomsup Kim |
| 1997 | ASPDAC | Optimal loop bandwidth design for low noise PLL applications. | Kyoohyun Lim, Seung Hee Choi, Beomsup Kim |
| 1995 | ASPDAC | A digital audio signal processor for cellular phone application. | Jeongsik Yang, Chanhong Park, Beomsup Kim |
| 1995 | ISCAS | Adaptive Carrier Recovery Using Multi-Order DPLL for Mobile Communication Applications. | Byungjin Chun, Beomsup Kim, Yong Hong Lee |
| 1994 | ISCAS | PLL/DLL System Noise Analysis for Low Jitter Clock Synthesizer Design. | Beomsup Kim, Todd C. Weigandt, Paul R. Gray |
| 1994 | ISCAS | Analysis of Timing Jitter in CMOS Ring Oscillators. | Todd C. Weigandt, Beomsup Kim, Paul R. Gray |
| 1993 | ISCAS | Optical MMSE gear-shifting algorithm for the fast synchronization of DPLL. | Beomsup Kim |