| 2024 | ISCAS | PVT-Insensitive Time-Domain-based In-Memory Computation with Improved Linearity for Binary Neural Networks. | Amandeep Singh, Bishnu Prasad Das |
| 2024 | ISCAS | A Peak-detector-based Ultra Low Power ECG ASIC for Early Detection of Cardio-Vascular Diseases. | Sidharth Thomas, Jaskirat Singh Virdi, Anshul Verma, Bishnu Prasad Das, Kenichi Okada, Pratap Narayan Singh |
| 2024 | VLSID | A Low Power Dual-Band Sub-Sampling Phase Locked Loop with sub-100 fs RMS Jitter and jitter. | Anshul Verma, Bishnu Prasad Das |
| 2023 | VLSID | Lightweight Approximate Multiplier with Improved Accuracy in FPGA for Error Resilient Application. | Apurba Prasad Padhy, Bishnu Prasad Das |
| 2023 | VLSID | Ultra-Low Power Non-Uniform SAR ADC based ECG detector for Early Detection of Cardiovascular Diseases. | Aditya Ramkumar, Anshul Verma, Bishnu Prasad Das |
| 2022 | DSD | RISC-V Core with Approximate Multiplier for Error-Tolerant Applications. | Anu Verma, Priyamvada Sharma, Bishnu Prasad Das |
| 2017 | VLSID | Within-Die Threshold Voltage Variability Estimation Using Reconfigurable Ring Oscillator. | Poorvi Jain, Bishnu Prasad Das |
| 2014 | DAC | Detecting Reliability Attacks during Split Fabrication using Test-only BEOL Stack. | Kaushik Vaidyanathan, Bishnu Prasad Das, Larry T. Pileggi |
| 2008 | VLSID | Voltage and Temperature Scalable Gate Delay and Slew Models Including Intra-Gate Variations. | Bishnu Prasad Das, Janakiraman Viraraghavan, Bharadwaj Amrutur, H. S. Jamadagni, N. V. Arvind |
| 2008 | VLSID | Voltage and Temperature Scalable Standard Cell Leakage Models Based on Stacks for Statistical Leakage Characterization. | Janakiraman Viraraghavan, Bishnu Prasad Das, Bharadwaj Amrutur |