| 2020 | ISLPED | Pin-in-the-middle: an efficient block pin assignment methodology for block-level monolithic 3D ICs. | Bon Woong Ku, Sung Kyu Lim |
| 2019 | DAC | RTL-to-GDS Tool Flow and Design-for-Test Solutions for Monolithic 3D ICs. | Heechun Park, Kyungwook Chang, Bon Woong Ku, Jinwoo Kim, Edward Lee, Daehyun Kim, Arjun Chaudhuri, Sanmitra Banerjee, Saibal Mukhopadhyay, Krishnendu Chakrabarty, Sung Kyu Lim |
| 2019 | ETS | Built-in Self-Test for Inter-Layer Vias in Monolithic 3D ICs. | Arjun Chaudhuri, Sanmitra Banerjee, Heechun Park, Bon Woong Ku, Krishnendu Chakrabarty, Sung Kyu Lim |
| 2018 | DAC | Design and architectural co-optimization of monolithic 3D liquid state machine-based neuromorphic processor. | Bon Woong Ku, Yu Liu, Yingyezhe Jin, Sandeep Kumar Samal, Peng Li, Sung Kyu Lim |
| 2018 | ICCAD | Area-efficient and low-power face-to-face-bonded 3D liquid state machine design. | Bon Woong Ku, Yu Liu, Yingyezhe Jin, Peng Li, Sung Kyu Lim |
| 2017 | ICCAD | Full-chip monolithic 3D IC design and power performance analysis with ASAP7 library: (Invited Paper). | Kyungwook Chang, Bon Woong Ku, Saurabh Sinha, Sung Kyu Lim |
| 2017 | ISLPED | Transistor-level monolithic 3D standard cell layout optimization for full-chip static power integrity. | Bon Woong Ku, Taigon Song, Arthur Nieuwoudt, Sung Kyu Lim |
| 2016 | ICCAD | How much cost reduction justifies the adoption of monolithic 3D ICs at 7nm node? | Bon Woong Ku, Peter Debacker, Dragomir Milojevic, Praveen Raghavan, Sung Kyu Lim |
| 2016 | ISLPED | Physical Design Solutions to Tackle FEOL/BEOL Degradation in Gate-level Monolithic 3D ICs. | Bon Woong Ku, Peter Debacker, Dragomir Milojevic, Praveen Raghavan, Diederik Verkest, Aaron Thean, Sung Kyu Lim |
| 2015 | DAC | Design, packaging, and architectural policy co-optimization for DC power integrity in 3D DRAM. | Yarui Peng, Bon Woong Ku, Youn-Sik Park, Kwang-Il Park, Seong-Jin Jang, Joo-Sun Choi, Sung Kyu Lim |