Bonita Bhaskaran
Publication record assembled from the DBLP archive of ranked conferences.
Papers indexed
10
Venues
3
Active years
2016–2025
Best venue rank
National
Where they publish
Papers
10 indexed papers, newest first.
| Year | Venue | Title | Authors |
|---|---|---|---|
| 2025 | VTS | Revisiting Microelectronics Resilience and Reliability in the Era of AI. | Arjun Chaudhuri, Bonita Bhaskaran |
| 2022 | ICCAD | Observation Point Insertion Using Deep Learning. | Bonita Bhaskaran, Sanmitra Banerjee, Kaushik Narayanun, Shao-Chun Hung, Seyed Nima Mozaffari Mojaveri, Mengyun Liu, Gang Chen, Tung-Che Liang |
| 2022 | VTS | On-Die Noise Measurement During Automatic Test Equipment (ATE) Testing and In-System-Test (IST). | Seyed Nima Mozaffari, Bonita Bhaskaran, Shantanu Sarangi, Suhas M. Satheesh, Kuo Lin Fu, Nithin Valentine, P. Manikandan, Mahmut Yilmaz |
| 2019 | ITC | An Efficient Supervised Learning Method to Predict Power Supply Noise During At-speed Test. | Seyed Nima Mozaffari, Bonita Bhaskaran, Kaushik Narayanun, Ayub Abdollahian, Vinod Pagalone, Shantanu Sarangi, Jonathon E. Colburn |
| 2019 | VTS | A Novel Graph Coloring Based Solution for Low-Power Scan Shift. | Saurabh Gupta, Bonita Bhaskaran, Shantanu Sarangi, Ayub Abdollahian, Jennifer Dworak |
| 2019 | VTS | Special Session: In-System-Test (IST) Architecture for NVIDIA Drive-AGX Platforms. | Pavan Kumar Datla Jagannadha, Mahmut Yilmaz, Milind Sonawane, Sailendra Chadalavada, Shantanu Sarangi, Bonita Bhaskaran, Shashank Bajpai, Venkat Abilash Reddy Nerallapally, Jayesh Pandey, Sam Jiang |
| 2017 | VTS | At-speed capture global noise reduction & low-power memory test architecture. | Bonita Bhaskaran, Sailendra Chadalavada, Shantanu Sarangi, Nithin Valentine, Venkat Abilash Reddy Nerallapally, Ayub Abdollahian |
| 2016 | ITC | Advanced test methodology for complex SoCs. | Pavan Kumar Datla Jagannadha, Mahmut Yilmaz, Milind Sonawane, Sailendra Chadalavada, Shantanu Sarangi, Bonita Bhaskaran, Ayub Abdollahian |
| 2016 | VTS | Test method and scheme for low-power validation in modern SOC integrated circuits. | Bonita Bhaskaran, Amit Sanghani, Kaushik Narayanun, Ayub Abdollahian, Amit Laknaur |
| 2016 | VTS | A programmable method for low-power scan shift in SoC integrated circuits. | Ran Wang, Bonita Bhaskaran, Karthikeyan Natarajan, Ayub Abdollahian, Kaushik Narayanun, Krishnendu Chakrabarty, Amit Sanghani |