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Bulent I. Dervisoglu

Publication record assembled from the DBLP archive of ranked conferences.

Papers indexed

10

Venues

3

Active years

1984–2002

Best venue rank

A*

Where they publish

Papers

10 indexed papers, newest first.

YearVenueTitleAuthors
2002VTSReducing Time to Volume and Time to Market: Is Silicon Debug and Diagnosis the Answer?Fidel Muradali, Mike Ricchetti, Bart Vermeulen, Bulent I. Dervisoglu, Bob Gottlieb, Bernd Koenemann, C. J. Clark
2001DACA Unified DFT Architecture for Use with IEEE 1149.1 and VSIA/IEEE P1500 Compliant Test Access Controllers.Bulent I. Dervisoglu
1999ITCDesign for testability: it is time to deliver it for Time-to-Market.Bulent I. Dervisoglu
1998ITCShared I/O-cell structures: a framework for extending the IEEE 1149.1 boundary-scan standard.Bulent I. Dervisoglu, Mike Ricchetti, William Eklow
1994DACMicroprocessor Testing: Which Technique is Best? (Panel).Jacob A. Abraham, Sandip Kundu, Janak H. Patel, Manuel A. d'Abreu, Bulent I. Dervisoglu, Marc E. Levitt, Hector R. Sucar, Ron G. Walther
1991ITCDesign for Testability: Using Scanpath Techniques for Path-Delay Test and Measurement.Bulent I. Dervisoglu, Gayvin E. Stong
1990ITCTowards a standard approach for controlling board-level test functions.Bulent I. Dervisoglu
1989DACATLAS/ELA: Scan-based Software Tools for Reducing System Debug Time in a State-of-the-art Workstation.Bulent I. Dervisoglu, M. A. Keil
1988ITCUsing Scan Technology for Debug and Diagnostics in a Workstation Environment.Bulent I. Dervisoglu
1984ITCOn Coosing a Hardware Descriptive Language for Digital Systems Testing/Verification.Bulent I. Dervisoglu