| 2016 | FPGA | Stratix™ 10 High Performance Routable Clock Networks. | Carl Ebeling, Dana How, David M. Lewis, Herman Schmit |
| 2012 | FCCM | Hardware Acceleration of Short Read Mapping. | Corey B. Olson, Maria Kim, Cooper Clauson, Boris Kogon, Carl Ebeling, Scott Hauck, Walter L. Ruzzo |
| 2012 | FPL | Adding dataflow-driven execution control to a Coarse-Grained Reconfigurable Array. | Robin Panda, Carl Ebeling, Scott Hauck |
| 2011 | FPGA | Energy-efficient specialization of functional units in a coarse-grained reconfigurable array. | Brian Van Essen, Robin Panda, Aaron Wood, Carl Ebeling, Scott Hauck |
| 2010 | FPL | Managing Short-Lived and Long-Lived Values in Coarse-Grained Reconfigurable Arrays. | Brian Van Essen, Robin Panda, Aaron Wood, Carl Ebeling, Scott Hauck |
| 2009 | FPGA | SPR: an architecture-adaptive CGRA mapping tool. | Stephen Friedman, Allan Carroll, Brian Van Essen, Benjamin Ylvisaker, Carl Ebeling, Scott Hauck |
| 2009 | FPL | Static versus scheduled interconnect in Coarse-Grained Reconfigurable Arrays. | Brian Van Essen, Aaron Wood, Allan Carroll, Stephen Friedman, Robin Panda, Benjamin Ylvisaker, Carl Ebeling, Scott Hauck |
| 2006 | FCCM | A Type Architecture for Hybrid Micro-Parallel Computers. | Benjamin Ylvisaker, Brian Van Essen, Carl Ebeling |
| 2006 | FPGA | A type architecture for hybrid micro-parallel computers. | Benjamin Ylvisaker, Brian Van Essen, Carl Ebeling |
| 2006 | FPL | Reducing the Space Complexity of Pipelined Routing Using Modified Range Encoding. | Allan Carroll, Carl Ebeling |
| 2005 | FPGA | Architecture Adaptive Routability-Driven Placement for FPGAs (abstract only). | Akshay Sharma, Carl Ebeling, Scott Hauck |
| 2005 | FPL | Architecture-Adaptive Routability-Driven Placement for FPGAs. | Akshay Sharma, Carl Ebeling, Scott Hauck |
| 2004 | FPGA | A compiled accelerator for biological cell signaling simulations. | John F. Keane, Christopher Bradley, Carl Ebeling |
| 2004 | FPGA | Exploration of pipelined FPGA interconnect structures. | Akshay Sharma, Katherine Compton, Carl Ebeling, Scott Hauck |
| 2003 | FPGA | PipeRoute: a pipelining-aware router for FPGAs. | Akshay Sharma, Carl Ebeling, Scott Hauck |
| 2003 | FPL | Implementing an OFDM Receiver on the RaPiD Reconfigurable Architecture. | Carl Ebeling, Chris Fisher, Guanbin Xing, Manyuan Shen, Hui Liu |
| 2001 | FPL | An Emulator for Exploring RaPiD Configurable Computing Architectures. | Chris Fisher, Kevin Rennie, Guanbin Xing, Stefan G. Berg, Kevin Bolding, John H. Naegle, Daniel Parshall, Dmitriy Portnov, Adnan Sulejmanpasic, Carl Ebeling |
| 1998 | FCCM | Specifying and Compiling Applications for RaPiD. | Darren C. Cronquist, Paul Franklin, Stefan G. Berg, Carl Ebeling |
| 1998 | ICCAD | Using precomputation in architecture and logic resynthesis. | Soha Hassoun, Carl Ebeling |
| 1997 | FCCM | Mapping applications to the RaPiD configurable architecture. | Carl Ebeling, Darren C. Cronquist, Paul Franklin, Jason Secosky, Stefan G. Berg |
| 1996 | DAC | Architectural Retiming: Pipelining Latency-Constrained Circuts. | Soha Hassoun, Carl Ebeling |
| 1996 | FPL | RaPiD - Reconfigurable Pipelined Datapath. | Carl Ebeling, Darren C. Cronquist, Paul Franklin |
| 1995 | FPGA | PathFinder: A Negotiation-based Performance-driven Router for FPGAs. | Larry McMurchie, Carl Ebeling |
| 1994 | ICCD | Mesh Routing Topologies for Multi-FPGA Systems. | Scott Hauck, Gaetano Borriello, Carl Ebeling |
| 1993 | DAC | SubGemini: Identifying SubCircuits using a Fast Subgraph Isomorphism Algorithm. | Miles Ohlrich, Carl Ebeling, Eka Ginting, Lisa Sather |
| 1993 | ICCAD | The practical application of retiming to the design of high-performance systems. | Brian Lockyear, Carl Ebeling |
| 1992 | FPGA | MONTAGNE: An FPL for Synchronous and Asynchronous Circuits. | Scott Hauck, Gaetano Borriello, Steven M. Burns, Carl Ebeling |
| 1989 | ICCAD | WireLisp: combining graphics and procedures in a circuit specification language. | Carl Ebeling, Zhanbing Wu |
| 1988 | ICCAD | GeminiII: a second generation layout validation program. | Carl Ebeling |
| 1984 | ISCA | The Design and Implementation of a VLSI Chess Move Generator. | Carl Ebeling, Andrew J. Palay |