| 2005 | ICASSP | A multi-core SoC design for advanced image and video compression. | Andreas Dehnhardt, Mark Bernd Kulaczewski, Lars Friebe, Sren Moch, Peter Pirsch, Hans-Joachim Stolberg, Carsten Reuter |
| 2002 | RSP | Benefits of Macro-Based Multi-FPGA Partitioning for Video Processing Applications. | Javier Martn-Langerwerf, Carsten Reuter, Holger Kropp, Peter Pirsch |
| 2001 | FCCM | The Effect of FPGA Granularity on Video Codec Implementations. | Jrn Gause, Carsten Reuter, Holger Kropp, Peter Y. K. Cheung, Wayne Luk |
| 2000 | FPL | A Mapping Methodology for Code Trees onto LUT-Based FPGAs. | Holger Kropp, Carsten Reuter |
| 1999 | FPL | An FPGA-based Prototyping System for Real-Time Verification of Video Processing Schemes. | Holger Kropp, Carsten Reuter, Matthias Wiege, Tien-Toan Do, Peter Pirsch |
| 1998 | FPL | A Flexible Implementation of High-Performance FIR Filters on Xilinx FPGAs. | Tien-Toan Do, Holger Kropp, Carsten Reuter, Peter Pirsch |
| 1998 | RSP | The Video and Image Processing Emulation System VIPES. | Holger Kropp, Carsten Reuter, Peter Pirsch |