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Catherine H. Gebotys

Publication record assembled from the DBLP archive of ranked conferences.

Papers indexed

25

Venues

15

Active years

1988–2019

Best venue rank

A*

Where they publish

Papers

25 indexed papers, newest first.

YearVenueTitleAuthors
2019DATEPUFs Deep Attacks: Enhanced modeling attacks using deep learning techniques to break the security of double arbiter PUFs.Mahmoud Khalafalla, Catherine H. Gebotys
2019DATEMethodology for EM Fault Injection: Charge-based Fault Model.Haohao Liao, Catherine H. Gebotys
2019DSDCircumventing Uniqueness of XOR Arbiter PUFs.Caio Hoffman, Catherine H. Gebotys, Diego F. Aranha, Mario Lcio Crtes, Guido Arajo
2018CPAlgebraic Fault Attack on SHA Hash Functions Using Programmatic SAT Solvers.Saeed Nejati, Jan Horcek, Catherine H. Gebotys, Vijay Ganesh
2017SATA Propagation Rate Based Splitting Heuristic for Divide-and-Conquer Solvers.Saeed Nejati, Zack Newsham, Joseph Scott, Jia Hui Liang, Catherine H. Gebotys, Pascal Poupart, Vijay Ganesh
2011EuroCryptFaster Explicit Formulas for Computing Pairings over Ordinary Curves.Diego F. Aranha, Koray Karabina, Patrick Longa, Catherine H. Gebotys, Julio Lpez
2011ISCASCounteracting power analysis attack using Static Single-ended Logic.Amir Khatib Zadeh, Catherine H. Gebotys, Shahab Ardalan
2010CASESA new correlation frequency analysis of the side channel.Edgar Mateos, Catherine H. Gebotys
2010CHESEfficient Techniques for High-Speed Elliptic Curve Cryptography.Patrick Longa, Catherine H. Gebotys
2009ACNSNovel Precomputation Schemes for Elliptic Curve Cryptosystems.Patrick Longa, Catherine H. Gebotys
2009PKCFast Multibase Methods and Other Several Optimizations for Elliptic Curve Scalar Multiplication.Patrick Longa, Catherine H. Gebotys
2005CHESEM Analysis of Rijndael and ECC on a Wireless Java-Based PDA.Catherine H. Gebotys, Simon Ho, C. C. Tiu
2005NetworkingAn Energy-Efficient Image Representation for Secure Mobile Systems.Tim Woo, Catherine H. Gebotys, Sagar Naik
2002CHESSecure Elliptic Curve Implementations: An Analysis of Resistance to Power-Attacks in a DSP Processor.Catherine H. Gebotys, Robert J. Gebotys
2001DACUtilizing Memory Bandwidth in DSP Embedded Processors.Catherine H. Gebotys
2000DACPower minimization derived from architectural-usage of VLIW processors.Catherine H. Gebotys, Robert J. Gebotys, S. Wiratunga
1998ISLPEDAn empirical comparison of algorithmic, instruction, and architectural power prediction models for high performance embedded DSP processors.Catherine H. Gebotys, Robert J. Gebotys
1997DACLow Energy Memory and Register Allocation Using Network Flow.Catherine H. Gebotys
1997ICCADDSP address optimization using a minimum cost circulation technique.Catherine H. Gebotys
1992DACOptimal Scheduling and Allocation of Embedded VLSI Chips.Catherine H. Gebotys
1992ICCADOptimal synthesis of multichip architectures.Catherine H. Gebotys
1991DACSimultaneous Scheduling and Allocation for Cost Constrained Optimal Architectural Synthesis.Catherine H. Gebotys, Mohamed I. Elmasry
1990ICCADA Global Optimization Approach for Architectural Synthesis.Catherine H. Gebotys, Mohamed I. Elmasry
1988DACVLSI Design Synthesis with Testability.Catherine H. Gebotys, Mohamed I. Elmasry
1988ICCDIntegrated design and test synthesis.Catherine H. Gebotys, Mohamed I. Elmasry