| 2026 | DATE | Late Breaking Results: PolyRAD - Polynomial Formal Verification of Restoring Array Dividers. | Mohamed A. Nadeem, Chandan Kumar Jha, Rolf Drechsler |
| 2026 | DDECS | Approximated MAGIC-ReRAM Adder Circuits for Low-Latency In-Memory Computing. | Saeideh Nabipour, Chandan Kumar Jha, Saeideh Shirinzadeh, Rolf Drechsler |
| 2026 | VLSID | DIVIAC: Library of Input Data Aware Approximate Dividers with Partial Exact Minimization. | Chandan Kumar Jha, Sallar Ahmadi-Pour, Sajjad Parvin, Rolf Drechsler |
| 2026 | VLSID | PolyEMAC: Polynomial Error Metrics Analysis in Approximate Computing. | Mohamed A. Nadeem, Chandan Kumar Jha, Rolf Drechsler |
| 2025 | DATE | Polynomial Formal Verification of Sequential Circuits Using Weighted-AIGs. | Mohamed A. Nadeem, Chandan Kumar Jha, Rolf Drechsler |
| 2025 | DDECS | River: Sneak Path Aware READ-based In-Memory Computing for 1T1M Memristive Crossbars. | Till Schnittka, Chandan Kumar Jha, Sallar Ahmadi-Pour, Rolf Drechsler |
| 2025 | ETS | Large Language Models (LLMs) for Verification, Testing, and Design. | Chandan Kumar Jha, Muhammad Hassan, Khushboo Qayyum, Sallar Ahmadi-Pour, Kangwei Xu, Ruidi Qiu, Jason Blocklove, Luca Collini, Andre Nakkab, Ulf Schlichtmann, Grace Li Zhang, Ramesh Karri, Bing Li, Siddharth Garg, Rolf Drechsler |
| 2025 | FDL | System-Level Design Space Exploration for Matrix Multiplication using Compute-In-Memory Unit. | Deepak Ravibabu, Sallar Ahmadi-Pour, Muhammad Hassan, Abhoy Kole, Chandan Kumar Jha, Rolf Drechsler |
| 2025 | VLSID | FARAD: Automated Formal Verification of Approximate Restoring Array Dividers. | Chandan Kumar Jha, Khushboo Qayyum, Muhammad Hassan, Rolf Drechsler |
| 2025 | VLSID | True-PolyTronik: Securing Circuits Against Laser Logic State Imaging Attack Using RFET. | Sajjad Parvin, Chandan Kumar Jha, Frank Sill Torres, Rolf Drechsler |
| 2024 | ASPDAC | MemSPICE: Automated Simulation and Energy Estimation Framework for MAGIC-Based Logic-in-Memory. | Simranjeet Singh, Chandan Kumar Jha, Ankit Bende, Vikas Rana, Sachin B. Patkar, Rolf Drechsler, Farhad Merchant |
| 2024 | DAC | Late Breaking Results: LLM-assisted Automated Incremental Proof Generation for Hardware Verification. | Khushboo Qayyum, Muhammad Hassan, Sallar Ahmadi-Pour, Chandan Kumar Jha, Rolf Drechsler |
| 2024 | DATE | LLM-Guided Formal Verification Coupled with Mutation Testing. | Muhammad Hassan, Sallar Ahmadi-Pour, Khushboo Qayyum, Chandan Kumar Jha, Rolf Drechsler |
| 2024 | DATE | Hidden Cost of Circuit Design with RFETs. | Sajjad Parvin, Chandan Kumar Jha, Frank Sill Torres, Rolf Drechsler |
| 2024 | ETS | Polynomial Formal Verification of Approximate Adders with Constant Cutwidth. | Mohamed A. Nadeem, Chandan Kumar Jha, Rolf Drechsler |
| 2024 | VLSID | Experimental Validation of Memristor-Aided Logic Using 1T1R TaOx RRAM Crossbar Array. | Ankit Bende, Simranjeet Singh, Chandan Kumar Jha, Tim Kempen, Felix Cppers, Christopher Bengel, Andre Zambanini, Dennis Nielinger, Sachin B. Patkar, Rolf Drechsler, Rainer Waser, Farhad Merchant, Vikas Rana |
| 2024 | VLSID | Input Distribution Aware Library of Approximate Adders Based on Memristor-Aided Logic. | Chandan Kumar Jha, Sallar Ahmadi-Pour, Rolf Drechsler |
| 2023 | DATE | Analysis of Quantization Across DNN Accelerator Architecture Paradigms. | Tom Glint, Chandan Kumar Jha, Manu Awasthi, Joycee Mekie |
| 2023 | ISPASS | Analysis of Conventional, Near-Memory, and In-Memory DNN Accelerators. | Tom Glint, Chandan Kumar Jha, Manu Awasthi, Joycee Mekie |
| 2022 | DATE | Data-Aware Cache Management for Graph Analytics. | Neelam Sharma, Varun Venkitaraman, Newton, Vikash Kumar, Shubham Singhania, Chandan Kumar Jha |
| 2021 | ISCAS | FPCAM: Floating Point Configurable Approximate Multiplier for Error Resilient Applications. | Chandan Kumar Jha, Sumit Walia, Gagan Kanojia, Joycee Mekie |
| 2020 | ISCAS | FPAD: A Multistage Approximation Methodology for Designing Floating Point Approximate Dividers. | Chandan Kumar Jha, Kailash Prasad, Vibhor Kumar Srivastava, Joycee Mekie |
| 2020 | ISCAS | SEDAAF: FPGA Based Single Exact Dual Approximate Adders for Approximate Processors. | Chandan Kumar Jha, Kailash Prasad, Arun Singh Tomar, Joycee Mekie |
| 2019 | DAC | SEDA - Single Exact Dual Approximate Adders for Approximate Processors. | Chandan Kumar Jha, Joycee Mekie |
| 2019 | DSD | Design of Novel CMOS Based Inexact Subtractors and Dividers for Approximate Computing: An In-Depth Comparison with PTL Based Designs. | Chandan Kumar Jha, Joycee Mekie |
| 2016 | COMSNETS | Efficient ECG data compression and transmission algorithm for telemedicine. | Chandan Kumar Jha, Maheshkumar H. Kolekar |