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Chen-Wei Lin

Publication record assembled from the DBLP archive of ranked conferences.

Papers indexed

9

Venues

4

Active years

2008–2018

Best venue rank

National

Where they publish

Papers

9 indexed papers, newest first.

YearVenueTitleAuthors
2018COMPSACEnhancing Inter-Node Process Migration for Load Balancing on Linux-Based NUMA Multicore Systems.Mei-Ling Chiang, Shu-Wei Tu, Wei-Lun Su, Chen-Wei Lin
2014VTSTesting methods for a write-assist disturbance-free dual-port SRAM.Hao-Yu Yang, Chen-Wei Lin, Chao-Ying Huang, Ching-Ho Lu, Chen-An Lai, Mango Chia-Tso Chao, Rei-Fu Huang
2013VTSInvestigation of gate oxide short in FinFETs and the test methods for FinFET SRAMs.Chen-Wei Lin, Mango Chia-Tso Chao, Chih-Chieh Hsu
2013VTSTesting of a low-VMIN data-aware dynamic-supply 8T SRAM.Chen-Wei Lin, Chin-Yuan Huang, Mango Chia-Tso Chao
2012ITCTesting strategies for a 9T sub-threshold SRAM.Hao-Yu Yang, Chen-Wei Lin, Hung-Hsin Chen, Mango Chia-Tso Chao, Ming-Hsien Tu, Shyh-Jye Jou, Ching-Te Chuang
2011ICCADDetecting stability faults in sub-threshold SRAMs.Chen-Wei Lin, Hao-Yu Yang, Chin-Yuan Huang, Hung-Hsin Chen, Mango Chia-Tso Chao
2010ICCADMathematical yield estimation for two-dimensional-redundancy memory arrays.Mango Chia-Tso Chao, Ching-Yu Chin, Chen-Wei Lin
2010ITCFault models and test methods for subthreshold SRAMs.Chen-Wei Lin, Hung-Hsin Chen, Hao-Yu Yang, Mango Chia-Tso Chao, Rei-Fu Huang
2008VTSA Built-In TFT Array Charge-Sensing Technique for System-on-Panel Displays.Chen-Wei Lin, Jiun-Lang Huang