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Chengyong Wu

Publication record assembled from the DBLP archive of ranked conferences.

Papers indexed

10

Venues

9

Active years

2008–2015

Best venue rank

A*

Where they publish

Papers

10 indexed papers, newest first.

YearVenueTitleAuthors
2015DATERetraining-based timing error mitigation for hardware neural networks.Jiachao Deng, Yuntan Fang, Zidong Du, Ying Wang, Huawei Li, Olivier Temam, Paolo Ienne, David Novo, Xiaowei Li, Yunji Chen, Chengyong Wu
2015MICRONeuromorphic accelerators: a comparison between neuroscience and machine-learning approaches.Zidong Du, Daniel D. Ben-Dayan Rubin, Yunji Chen, Liqiang He, Tianshi Chen, Lei Zhang, Chengyong Wu, Olivier Temam
2014ASPDACLeveraging the error resilience of machine-learning applications for designing highly energy efficient accelerators.Zidong Du, Krishna V. Palem, Lingamneni Avinash, Olivier Temam, Yunji Chen, Chengyong Wu
2014ASPLOSDianNao: a small-footprint high-throughput accelerator for ubiquitous machine-learning.Tianshi Chen, Zidong Du, Ninghui Sun, Jia Wang, Chengyong Wu, Yunji Chen, Olivier Temam
2014CASESA low-cost memory interface for high-throughput accelerators.Jing Huang, Yuanjie Huang, Olivier Temam, Paolo Ienne, Yunji Chen, Chengyong Wu
2014ISCAGoing vertical in memory management: Handling multiplicity by multi-policy.Lei Liu, Yong Li, Zehan Cui, Yungang Bao, Mingyu Chen, Chengyong Wu
2013FPGAElastic CGRAs.Yuanjie Huang, Paolo Ienne, Olivier Temam, Yunji Chen, Chengyong Wu
2012ASPLOSIterative optimization for the data center.Yang Chen, Shuangde Fang, Lieven Eeckhout, Olivier Temam, Chengyong Wu
2010PLDIEvaluating iterative optimization across 1000 datasets.Yang Chen, Yuanjie Huang, Lieven Eeckhout, Grigori Fursin, Liang Peng, Olivier Temam, Chengyong Wu
2008EuroParGlobal Tiling for Communication Minimal Parallelization on Distributed Memory Systems.Lei Liu, Li Chen, Chengyong Wu, Xiaobing Feng