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Chetan Kumar Vudadha

Publication record assembled from the DBLP archive of ranked conferences.

Papers indexed

7

Venues

3

Active years

2012–2024

Best venue rank

National

Where they publish

Papers

7 indexed papers, newest first.

YearVenueTitleAuthors
2024ISCASDesign of CNFET-based Ternary Conditional Sum Adders using Binary Carry Propagation.Chetan Kumar Vudadha
2020ISCASFILA: Fault-Model for Interconnection Links in Application-Specific Network-on-Chip Design.P. Veda Bhanu, Chetan Kumar Vudadha, J. Soumya
2020VLSIDA Novel Low Power Ternary Multiplier Design using CNFETs.Harita Sirugudi, Sharvani Gadgil, Chetan Kumar Vudadha
2017RCOptimizing the Reversible Circuits Using Complementary Control Line Transformation.Sai Phaneendra Parlapalli, Chetan Kumar Vudadha, M. B. Srinivas
2017RCAn ESOP Based Cube Decomposition Technique for Reversible Circuits.Sai Phaneendra Parlapalli, Chetan Kumar Vudadha, M. B. Srinivas
2014VLSIDAn Optimized Design of Reversible Quantum Comparator.P. Sai Phaneendra, Chetan Kumar Vudadha, Sreehari Veeramachaneni, M. B. Srinivas
2012VLSIDLow-Power Self Reconfigurable Multiplexer Based Decoder for Adaptive Resolution Flash ADCs.Chetan Kumar Vudadha, Goutham Makkena, M. Venkata Swamy Nayudu, P. Sai Phaneendra, Syed Ershad Ahmed, Sreehari Veeramachaneni, N. Moorthy Muthukrishnan, M. B. Srinivas