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Paper
A Novel Low Power Ternary Multiplier Design using CNFETs.
Harita Sirugudi
,
Sharvani Gadgil
,
Chetan Kumar Vudadha
Venue
National
VLSID
Year
2020
Proceedings
VLSID
DBLP record
conf/vlsid/SirugudiGV20 ↗
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