Chi-Chou Kao
Publication record assembled from the DBLP archive of ranked conferences.
Papers indexed
5
Venues
2
Active years
1999–2009
Best venue rank
C
Where they publish
Papers
5 indexed papers, newest first.
| Year | Venue | Title | Authors |
|---|---|---|---|
| 2009 | ISCAS | A Novel Digital Pixel Sensor System. | Yen-Tai Lai, Chia-Nan Yeh, Chi-Chou Kao |
| 2004 | ASPDAC | Area-minimal algorithm for LUT-based FPGA technology mapping with duplication-free restriction. | Chi-Chou Kao, Yen-Tai Lai |
| 2003 | ASPDAC | A technology mapping algorithm for heterogeneous FPGAs. | Chi-Chou Kao, Yen-Tai Lai |
| 1999 | ISCAS | A routability and performance driven technology mapping algorithm for LUT based FPGA designs. | Chi-Chou Kao, Yen-Tai Lai |
| 1999 | ISCAS | A quadratic programming method for interconnection crosstalk minimization. | Yen-Tai Lai, Chi-Chou Kao, Wu-Chien Shieh |