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Chia-Wei Liang

Publication record assembled from the DBLP archive of ranked conferences.

Papers indexed

2

Venues

2

Active years

2022–2025

Best venue rank

A*

Where they publish

Papers

2 indexed papers, newest first.

YearVenueTitleAuthors
2025VTSDesigning Radiation-Hardened D Flip-Flop with Reduced Latency and Area Using Filtering Buffer.Nelson M.-C. Wu, Lowry P.-T. Wang, Chia-Wei Liang, Charles H.-P. Wen, Herming Chiueh
2022DACSEM-latch: a lost-cost and high-performance latch design for mitigating soft errors in nanoscale CMOS process.Zhong-Li Tang, Chia-Wei Liang, Ming-Hsien Hsiao, Charles H.-P. Wen