| 2026 | DATE | An Efficient Weight Correction Method to Recover Non-ideal Errors in Pruned IRC Designs. | Shih-Han Chang, Yi-Min Pan, Chong-En Hong, Chien-Nan Jimmy Liu |
| 2025 | ASPDAC | On Awareness of Offset-Via and Teardrop in Advanced Packaging Interconnect Synthesis. | Hao-Ju Chang, Yu-Hung Chen, Hao-Wei Huang, Yihua Yeh, Hung-Ming Chen, Chien-Nan Jimmy Liu |
| 2023 | ASPDAC | On Automating Finger-Cap Array Synthesis with Optimal Parasitic Matching for Custom SAR ADC. | Cheng-Yu Chiang, Chia-Lin Hu, Mark Po-Hung Lin, Yu-Szu Chung, Shyh-Jye Jou, Jieh-Tsorng Wu, Shiuh-Hua Wood Chiang, Chien-Nan Jimmy Liu, Hung-Ming Chen |
| 2022 | ASPDAC | Fast Variation-aware Circuit Sizing Approach for Analog Design with ML-Assisted Evolutionary Algorithm. | Ling-Yen Song, Tung-Chieh Kuo, Ming-Hung Wang, Chien-Nan Jimmy Liu, Juinn-Dar Huang |
| 2020 | ICCAD | Achieving Analog Layout Integrity through Learning and Migration Invited Talk. | Mark Po-Hung Lin, Hao-Yu Chi, Abhishek Patyal, Zheng-Yao Liu, Jun-Jie Zhao, Chien-Nan Jimmy Liu, Hung-Ming Chen |
| 2019 | ICCAD | Achieving Routing Integrity in Analog Layout Migration via Cartesian Detection Lines. | Hao-Yu Chi, Zi-Jun Lin, Chia-Hao Hung, Chien-Nan Jimmy Liu, Hung-Ming Chen |
| 2018 | ASPDAC | Performance-preserved analog routing methodology via wire load reduction. | Hao-Yu Chi, Hwa-Yi Tseng, Chien-Nan Jimmy Liu, Hung-Ming Chen |
| 2016 | ISCAS | Wave digital filter based analog circuit emulation on FPGA. | Wei Wu, Yen-Lung Chen, Yue Ma, Chien-Nan Jimmy Liu, Jing-Yang Jou, Sudhakar Pamarti, Lei He |
| 2015 | ASPDAC | Incremental Latin hypercube sampling for lifetime stochastic behavioral modeling of analog circuits. | Yen-Lung Chen, Wei Wu, Chien-Nan Jimmy Liu, Lei He |
| 2014 | ISCAS | A novel design space reduction method for efficient simulation-based optimization. | Hsing-Han Tseng, Shiou-Wen Wang, Jian-Yu Chen, Chien-Nan Jimmy Liu |
| 2013 | DATE | Automatic circuit sizing technique for the analog circuits with flexible TFTs considering process variation and bending effects. | Yen-Lung Chen, Wan-Rong Wu, Guan-Ruei Lu, Chien-Nan Jimmy Liu |
| 2012 | MEMOCODE | Improving design verifiability by early RTL coverability analysis. | Kai-Hui Chang, Chia-Wei Chang, Jie-Hong Roland Jiang, Chien-Nan Jimmy Liu |
| 2011 | ASPDAC | ILP-based inter-die routing for 3D ICs. | Chia-Jen Chang, Pao-Jen Huang, Tai-Chen Chen, Chien-Nan Jimmy Liu |
| 2010 | DAC | Behavior-level yield enhancement approach for large-scaled analog circuits. | Chin-Cheng Kuo, Yen-Lung Chen, I-Ching Tsai, Li-Yu Chan, Chien-Nan Jimmy Liu |
| 2010 | ISCAS | Dynamic IR drop estimation at gate level with standard library information. | Mu-Shun Matt Lee, Kuo-Sheng Lai, Chia-Ling Hsu, Chien-Nan Jimmy Liu |
| 2010 | ISCAS | Automatic circuit adjustment technique for process sensitivity reduction and yield improvement. | Hsiu-Wen Li, Ren-Hong Fu, Hsin-Yu Luo, Chien-Nan Jimmy Liu |
| 2009 | ASPDAC | A SCORE macromodel for PLL designs to analyze supply noise interaction issues at behavioral level. | Chin-Cheng Kuo, Pei-Syun Lin, Chien-Nan Jimmy Liu |
| 2009 | DATE | Package routability- and IR-drop-aware finger/pad assignment in chip-package co-design. | Chao-Hung Lu, Hung-Ming Chen, Chien-Nan Jimmy Liu, Wen-Yu Shih |
| 2007 | ASPDAC | On Increasing Signal Integrity with Minimal Decap Insertion in Area-Array SoC Floorplan Design. | Chao-Hung Lu, Hung-Ming Chen, Chien-Nan Jimmy Liu |
| 2006 | ISCAS | An efficient mechanism to provide full visibility for hardware debugging. | Wei-Hsiang Cheng, Chin-Lung Chuang, Chien-Nan Jimmy Liu |
| 2006 | SMC | Estimation of Loss Coefficients of Nonlinear Rubber Using Iterative H∞ Filter. | Chih-Hu Wang, Bore-Kuen Lee, Wei-Hang Tseng, Chung-Hsi Fu, Chauchin Su, Chien-Nan Jimmy Liu |
| 2005 | ASPDAC | An observability measure to enhance statement coverage metric for proper evaluation of verification completeness. | Tai-Ying Jiang, Chien-Nan Jimmy Liu, Jing-Yang Jou |
| 2005 | ISCAS | A novel approach for high-level power modeling of sequential circuits using recurrent neural networks. | Wen-Tsan Hsieh, Chih-Chieh Shiue, Chien-Nan Jimmy Liu |
| 2005 | ISCAS | Estimating likelihood of correctness for error candidates to assist debugging faulty HDL designs. | Tai-Ying Jiang, Chien-Nan Jimmy Liu, Jing-Yang Jou |
| 2003 | ASPDAC | An efficient IP-level power model for complex digital circuits. | Chih-Yang Hsu, Chien-Nan Jimmy Liu, Jing-Yang Jou |
| 2001 | ASPDAC | An efficient design-for-verification technique for HDLs. | Chien-Nan Jimmy Liu, I-Ling Chen, Jing-Yang Jou |
| 2000 | ISCAS | A novel approach for functional coverage measurement in HDL. | Chien-Nan Jimmy Liu, Chen-Yi Chang, Jing-Yang Jou, Ming-Chih Lai, Hsing-Ming Juan |
| 1999 | ICCD | An Efficient Functional Coverage Test for HDL Descriptions at RTL. | Chien-Nan Jimmy Liu, Jing-Yang Jou |