| 2026 | ISCAS | A 17.28-Gb/s Transceiver With Hybrid Phase-Interpolated Clock and Data Recovery in 40-nm CMOS. | Shuo Han, Sheng-You Liu, Kai-Hung Chou, Min-Shu Shih, Ping-Heng Wu, Ching-Yuan Yang |
| 2014 | ISCAS | A high-speed low-power calibrated flash ADC. | Hsuan-Yu Chang, Ching-Yuan Yang |
| 2012 | ISCAS | A chip-to-chip clock-deskewing circuit for 3-D ICs. | Ai-Jia Chuang, Yu Lee, Ching-Yuan Yang |
| 2011 | ISLPED | A low-power direct digital frequency synthesizer using an analogue-sine-conversion technique. | Jun-Hong Weng, Ching-Yuan Yang, Yi-Lin Jhu |
| 2010 | DATE | An embedded wide-range and high-resolution CLOCK jitter measurement circuit. | Yu Lee, Ching-Yuan Yang, Nai-Chen Daniel Cheng, Ji-Jan Chen |
| 2006 | ISCAS | A frequency synthesizer realized by a transformer-based voltage-controlled oscillator for IEEE 802.11a/b/g channels. | Meng-Ting Tsai, Ching-Yuan Yang |
| 2006 | ISCAS | A 1.8-Gb/s burst-mode clock and data recovery circuit with a 1/4-rate clock technique. | Jun-Hong Weng, Meng-Ting Tsai, Jung-Mao Lin, Ching-Yuan Yang |
| 2006 | ISCAS | A low-noise microsensor amplifier with automatic gain control system. | Jun-Hong Weng, Chong-Jng Yu, Ching-Yuan Yang, Peng-Chang Yang |
| 2005 | ISCAS | A high-frequency phase-compensation fractional-N frequency synthesizer. | Ching-Yuan Yang, Jen-Wen Chen, Meng-Ting Tsai |
| 2005 | ISCAS | A 0.18-m CMOS 1-Gb/s serial link transceiver by using PWM and PAM techniques. | Ching-Yuan Yang, Yu Lee |