A 17.28-Gb/s Transceiver With Hybrid Phase-Interpolated Clock and Data Recovery in 40-nm CMOS.
Shuo Han, Sheng-You Liu, Kai-Hung Chou, Min-Shu Shih, Ping-Heng Wu, Ching-Yuan Yang
Browse the full ISCAS paper archive.
Shuo Han, Sheng-You Liu, Kai-Hung Chou, Min-Shu Shih, Ping-Heng Wu, Ching-Yuan Yang
Browse the full ISCAS paper archive.