| 2008 | ISCAS | A reconfigurable MAC architecture implemented with mixed-Vt standard cell library. | Li-Rong Wang, Yi-Wei Chiu, Chia-Lin Hu, Ming-Hsien Tu, Shyh-Jye Jou, Chung-Len Lee |
| 2006 | ASPDAC | IEEE standard 1500 compatible interconnect diagnosis for delay and crosstalk faults. | Katherine Shu-Min Li, Yao-Wen Chang, Chauchin Su, Chung-Len Lee, Jwu E. Chen |
| 2006 | ITC | A Multilayer Data Copy Scheme for Low Cost Test with Controlled Scan-In Power for Multiple Scan Chain Designs. | Shih Ping Lin, Chung-Len Lee, Jwu E. Chen, Ji-Jan Chen, Kun-Lun Luo, Wen Ching Wu |
| 2005 | ASPDAC | Oscillation ring based interconnect test scheme for SOC. | Katherine Shu-Min Li, Chung-Len Lee, Chauchin Su, Jwu E. Chen |
| 2002 | DATE | An Efficient Test and Diagnosis Scheme for the Feedback Type of Analog Circuits with Minimal Added Circuits. | Jun-Weir Lin, Chung-Len Lee, Jwu E. Chen |
| 2001 | ASPDAC | A computer aided engineering system for memory BIST. | Chauchin Su, Shih-Ching Hsiao, Hau-Zen Zhau, Chung-Len Lee |
| 2001 | VTS | Socillator Test: A Delay Test Scheme for Embedded ICs in the Boundary-Scan Environment. | Tek Jau Tan, Chung-Len Lee |
| 2000 | DATE | All Digital Built-in Delay and Crosstalk Measurement for On-Chip Buses. | Chauchin Su, Yue-Tsang Chen, Mu-Jeng Huang, Gen-Nan Chen, Chung-Len Lee |
| 1998 | ITC | Maximization of power dissipation under random excitation for burn-in testing. | Kuo-Chan Huang, Chung-Len Lee, Jwu E. Chen |
| 1998 | VTS | Partial Reset and Scan for Flip-Flops Based on States Requirement for Test Generation. | Hsing-Chung Liang, Chung-Len Lee, Jwu E. Chen |
| 1997 | VTS | Functional test pattern generation for CMOS operational amplifier. | Soon-Jyh Chang, Chung-Len Lee, Jwu E. Chen |
| 1991 | DAC | A Probabilistic Testability Measure for Delay Faults. | Wen Ching Wu, Chung-Len Lee |
| 1990 | ITC | Single-fault fault collapsing analysis in sequential logic circuits. | Jwu E. Chen, Chung-Len Lee, Wen-Zen Shen |