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Dai Yamamoto

Publication record assembled from the DBLP archive of ranked conferences.

Papers indexed

12

Venues

10

Active years

2005–2026

Best venue rank

A*

Where they publish

Papers

12 indexed papers, newest first.

YearVenueTitleAuthors
2026WWWDHOW-MiLLA: Joint Workshop on Diffusion of Harmful Content on Online Web and Countering Misinformation in the Age of LLMs and Agents.Gautam Kishore Shahi, Thomas Mandl, Haiming Liu, Amit Kumar Jaiswal, Durgesh Nandini, Luis-Daniel Ibez, Junichi Suga, Dai Yamamoto, Rahul Mishra, Rajakrishnan P. Rajkumar, Sagar Uprety, Bornali Phukon, Sujit Kumar
2016CCSEvaluation of Latch-based Physical Random Number Generator Implementation on 40 nm ASICs.Naoya Torii, Dai Yamamoto, Tsutomu Matsumoto
2015ASPDACImplementation of double arbiter PUF and its performance evaluation on FPGA.Takanori Machida, Dai Yamamoto, Mitsugu Iwamoto, Kazuo Sakiyama
2014FedCSISA New Mode of Operation for Arbiter PUF to Improve Uniqueness on FPGA.Takanori Machida, Dai Yamamoto, Mitsugu Iwamoto, Kazuo Sakiyama
2014FedCSISSecurity Evaluation of Bistable Ring PUFs on FPGAs using Differential and Linear Analysis.Dai Yamamoto, Masahiko Takenaka, Kazuo Sakiyama, Naoya Torii
2014IWSECA Technique Using PUFs for Protecting Circuit Layout Designs against Reverse Engineering.Dai Yamamoto, Masahiko Takenaka, Kazuo Sakiyama, Naoya Torii
2013CARDISEvaluation of ASIC Implementation of Physical Random Number Generators Using RS Latches.Hirotaka Kokubo, Dai Yamamoto, Masahiko Takenaka, Kouichi Itoh, Naoya Torii
2011CHESUniqueness Enhancement of PUF Responses Based on the Locations of Random Outputting RS Latches.Dai Yamamoto, Kazuo Sakiyama, Mitsugu Iwamoto, Kazuo Ohta, Takao Ochiai, Masahiko Takenaka, Kouichi Itoh
2010WISTPA Very Compact Hardware Implementation of the KASUMI Block Cipher.Dai Yamamoto, Kouichi Itoh, Jun Yajima
2008CHESA Very Compact Hardware Implementation of the MISTY1 Block Cipher.Dai Yamamoto, Jun Yajima, Kouichi Itoh
2007ICCCNDesign and Empirical Evaluation of Control Scheme for End-to-End Delay Stabilization and Packet Loss Improvement in Broadband IP Network.Dai Yamamoto, Hideki Tode, Toshihiro Masaki, Koso Murakami
2005LCNA Method for Guaranteeing End-to-End Delay by Mutual Cooperation between IP Routers.Dai Yamamoto, Rie Fujita, Hideki Tode, Koso Murakami, Toshihiro Masaki