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Daniel Chillet

Publication record assembled from the DBLP archive of ranked conferences.

Papers indexed

20

Venues

14

Active years

1997–2025

Best venue rank

A*

Where they publish

Papers

20 indexed papers, newest first.

YearVenueTitleAuthors
2025IOLTSFault Tolerance in Quantized and Pruned Convolutional Neural Networks.Wilfread Guillem, Angeliki Kritikakou, Youri Helen, Cdric Killian, Daniel Chillet
2024DACHTAG-eNN: Hardening Technique with AND Gates for Embedded Neural Networks.Wilfread Guillem, Angeliki Kritikakou, Youri Helen, Cdric Killian, Daniel Chillet
2024IOLTSVANDOR: Mitigating SEUs into Quantized Neural Networks.Wilfread Guillem, Angeliki Kritikakou, Youri Helen, Cdric Killian, Daniel Chillet
2020ICCDMultiple Permanent Faults Mitigation Through Bit-Shuffling for Network-an-Chip Architecture.Romain Mercier, Cdric Killian, Angeliki Kritikakou, Youri Helen, Daniel Chillet
2018ENASEMapping of Periodic Tasks in Reconfigurable Heterogeneous Multi-core Platforms.Aymen Gammoudi, Daniel Chillet, Mohamed Khalgui, Adel Benzina
2017DACEnergy and Performance Trade-off in Nanophotonic Interconnects using Coding Techniques.Cdric Killian, Daniel Chillet, Sbastien Le Beux, Van-Dung Pham, Olivier Sentieys, Ian O'Connor
2017DATEPerformance and energy aware wavelength allocation on ring-based WDM 3D optical NoC.Jiating Luo, A. Elantably, Van-Dung Pham, Cdric Killian, Daniel Chillet, Sbastien Le Beux, Olivier Sentieys, Ian O'Connor
2016ICTAIReal-Time Scheduling of Reconfigurable Battery-Powered Multi-Core Platforms.Aymen Gammoudi, Adel Benzina, Mohamed Khalgui, Daniel Chillet
2015SoMeTNew Pack Oriented Solutions for Energy-Aware Feasible Adaptive Real-Time Systems.Aymen Gammoudi, Adel Benzina, Mohamed Khalgui, Daniel Chillet
2014IJCCIIntrinsic Fault Tolerance of Hopfield Artificial Neural Network Model for Task Scheduling Technique in SoC.Rajhans Singh, Daniel Chillet
2012DATEUPaRC - Ultra-fast power-aware reconfiguration controller.Robin Bonamy, Hung-Manh Pham, Sbastien Pillement, Daniel Chillet
2012DSDOpen-People: Open Power and Energy Optimization PLatform and Estimator.Eric Senn, Daniel Chillet, Olivier Zendra, Ccile Belleudy, Sbastien Bilavarn, Rabie Ben Atitallah, Christian Samoyeau, A. Fritsch
2011IJCCIParallel Evaluation of Hopfield Neural Networks.Antoine Eiche, Daniel Chillet, Sbastien Pillement, Olivier Sentieys
2007IJCNNA Neural Network Model for Real-Time Scheduling on Heterogeneous SoC Architectures.Daniel Chillet, Sbastien Pillement, Olivier Sentieys
2002CASESAutomatic floating-point to fixed-point conversion for DSP code generation.Daniel Mnard, Daniel Chillet, Franois Charot, Olivier Sentieys
2002FPLA Compilation Framework for a Dynamically Reconfigurable Architecture.Raphal David, Daniel Chillet, Sbastien Pillement, Olivier Sentieys
2002ICASSPMapping future generation mobile telecommunication applications on a dynamically reconfigurable arcidtecture.Raphal David, Daniel Chillet, Sbastien Pillement, Olivier Sentieys
2000ISCASMulti-algorithm ASIP synthesis and power estimation for DSP applications.Jean-Gabriel Cousin, Olivier Sentieys, Daniel Chillet
1999ISCASBehavioral synthesis of asynchronous systems: a methodology.J. O. Dedou, Daniel Chillet, Olivier Sentieys
1997ICASSPVLSI high level synthesis of fast exact least mean square algorithms based on fast FIR filters.Jean-Philippe Diguet, Olivier Sentieys, Daniel Chillet, Jean Luc Philippe