| 2010 | DATE | Accurate timed RTOS model for transaction level modeling. | Yonghyun Hwang, Gunar Schirner, Samar Abdi, Daniel D. Gajski |
| 2010 | RSP | Embedded system environment: A framework for TLM-based design and prototyping. | Samar Abdi, Yonghyun Hwang, Lochi Yu, Hansu Cho, Ines Viskic, Daniel D. Gajski |
| 2007 | DAC | TLM: Crossing Over From Buzz To Adoption. | Francine Bacchini, Daniel D. Gajski, Laurent Maillet-Contoz, Haruhisa Kashiwagi, Jack Donovan, Tommi Mkelinen, Jack Greenbaum, Rishiyur S. Nikhil |
| 2007 | DDECS | New Strategies for System-Level Design. | Daniel D. Gajski |
| 2006 | ASPDAC | Designing a custom architecture for DCT using NISC technology. | Bita Gorjiara, Mehrdad Reshadi, Daniel D. Gajski |
| 2005 | ASPDAC | System-level communication modeling for network-on-chip synthesis. | Andreas Gerstlauer, Dongwan Shin, Rainer Dmer, Daniel D. Gajski |
| 2005 | DATE | Functional Validation of System Level Static Scheduling. | Samar Abdi, Daniel D. Gajski |
| 2005 | DATE | Defining an Enhanced RTL Semantics. | Shuqing Zhao, Daniel D. Gajski |
| 2005 | ICCD | Utilizing Horizontal and Vertical Parallelism with a No-Instruction-Set Compiler for Custom Datapaths. | Mehrdad Reshadi, Bita Gorjiara, Daniel D. Gajski |
| 2005 | MEMOCODE | Structural operational semantics for supporting multi-cycle operations in RTL HDLs. | Shuqing Zhao, Daniel D. Gajski |
| 2002 | SMC | Seamless approach for the design of control systems for power electronics and electric drives. | Slim Ben Saoud, Daniel D. Gajski, Andreas Gerstlauer |
| 1998 | ICCD | Hierarchical pipelining for behaviors, loops, and operations. | Smita Bakshi, Daniel D. Gajski |
| 1997 | ASPDAC | A quantitative analysis for optimizing memory allocation. | Youn-Sik Hong, Choong-Hee Cho, Daniel D. Gajski |
| 1996 | DATE | Model Refinement for Hardware-Software Codesign. | Jie Gong, Daniel D. Gajski, Smita Bakshi |
| 1995 | DATE | Software estimation using a generic-processor model. | Jie Gong, Daniel D. Gajski, Sanjiv Narayan |
| 1995 | DATE | Architectural exploration for datapaths with memory hierarchy. | Nancy D. Holmes, Daniel D. Gajski |
| 1995 | DATE | SLIF: a specification-level intermediate format for system design. | Frank Vahid, Daniel D. Gajski |
| 1994 | ICCAD | Design exploration for high-performance pipelines. | Smita Bakshi, Daniel D. Gajski |
| 1994 | ICCAD | Condition graphs for high-quality behavioral synthesis. | Hsiao-Ping Juan, Viraphol Chaiyakul, Daniel D. Gajski |
| 1992 | VLSID | System Level Specification and Synthesis. | Sanjiv Narayan, Frank Vahid, Daniel D. Gajski |
| 1989 | ICTAI | The role of learning in logic synthesis. | James R. Kipps, Daniel D. Gajski |
| 1988 | ICCD | Synthesis from VHDL. | Joseph Lis, Daniel D. Gajski |
| 1985 | DAC | Decomposition of logic networks into silicon. | Steven T. Healey, Daniel D. Gajski |
| 1984 | DAC | Silicon compilers and expert systems for VLSI. | Daniel D. Gajski |
| 1984 | DAC | Microprocessor synthesis. | Vijay K. Raj, Barry M. Pangrle, Daniel D. Gajski |
| 1982 | ICPP | Iterative algorithms for tridiagonal matrices on a WSI-multiprocessor. | Daniel D. Gajski, Ahmed H. Sameh, John A. Wisniewski |
| 1981 | DAC | Automatic generation of cells for recurrence structures. | Avinoam Bilgory, Daniel D. Gajski |
| 1980 | DAC | Automatic design with dependence graphs. | Albert E. Casavant, Daniel D. Gajski, David J. Kuck |
| 1978 | ARITH | Design of arithmetic elements for Burroughs Scientific Processor. | Daniel D. Gajski, Louis P. Rubinfield |