| 2010 | DAC | What input-language is the best choice for high level synthesis (HLS)? | Daniel Gajski, Todd M. Austin, Steve Svoboda |
| 2009 | ASPDAC | Hardware-dependent software synthesis for many-core embedded systems. | Samar Abdi, Gunar Schirner, Ines Viskic, Hansu Cho, Yonghyun Hwang, Lochi Yu, Daniel Gajski |
| 2008 | DAC | Specify-explore-refine (SER): from specification to implementation. | Andreas Gerstlauer, Junyu Peng, Dongwan Shin, Daniel Gajski, Atsushi Nakamura, Dai Araki, Yuuji Nishihara |
| 2008 | DAC | Automatic architecture refinement techniques for customizing processing elements. | Bita Gorjiara, Daniel Gajski |
| 2008 | DAC | C-based design flow: a case study on G.729A for voice over internet protocol (VoIP). | Mehrdad Reshadi, Bita Gorjiara, Daniel Gajski |
| 2008 | DATE | Cycle-approximate Retargetable Performance Estimation at the Transaction Level. | Yonghyun Hwang, Samar Abdi, Daniel Gajski |
| 2007 | DATE | Interrupt and low-level programming support for expanding the application domain of statically-scheduled horizontal-microcoded architectures in embedded systems. | Mehrdad Reshadi, Daniel Gajski |
| 2007 | FPGA | FPGA-friendly code compression for horizontal microcoded custom IPs. | Bita Gorjiara, Daniel Gajski |
| 2007 | ICCD | A novel profile-driven technique for simultaneous power and code-size optimization of microcoded IPs. | Bita Gorjiara, Daniel Gajski |
| 2006 | ASPDAC | Design and implementation of transducer for ARM-TMS communication. | Hansu Cho, Samar Abdi, Daniel Gajski |
| 2006 | DSD | A Graph Based Algorithm for Data Path Optimization in Custom Processors. | Jelena Trajkovic, Mehrdad Reshadi, Bita Gorjiara, Daniel Gajski |
| 2006 | ICCD | Aspect-Oriented Architecture Description for Retargetable Compilation, Simulation and Synthesis of Application-Specific Pipelined Datapaths . | Bita Gorjiara, Mehrdad Reshadi, Daniel Gajski |
| 2005 | ASPDAC | A formalism for functionality preserving system level transformations. | Samar Abdi, Daniel Gajski |
| 2005 | ASPDAC | Multi-metric and multi-entity characterization of applications for early system design exploration. | Lukai Cai, Andreas Gerstlauer, Daniel Gajski |
| 2005 | ASPDAC | A clustering technique to optimize hardware/software synchronization. | Junyu Peng, Samar Abdi, Daniel Gajski |
| 2005 | MEMOCODE | System design extreme makeover. | Daniel Gajski |
| 2004 | ASPDAC | On deriving equivalent architecture model from system specification. | Samar Abdi, Daniel Gajski |
| 2004 | ASPDAC | A novel memory size model for variable-mapping in system level design. | Lukai Cai, Haobo Yu, Daniel Gajski |
| 2004 | ASPDAC | Automatic generation of bus functional models from transaction level models. | Dongwan Shin, Samar Abdi, Daniel Gajski |
| 2004 | ASPDAC | Embedded software generation from system level design languages. | Haobo Yu, Rainer Dmer, Daniel Gajski |
| 2004 | DAC | Automatic generation of equivalent architecture model from functional specification. | Samar Abdi, Daniel Gajski |
| 2004 | DAC | Retargetable profiling for rapid, early system-level design space exploration. | Lukai Cai, Andreas Gerstlauer, Daniel Gajski |
| 2004 | DAC | Were the good old days all that good?: EDA then and now. | Shishpal Rawat, William H. Joyner Jr., John A. Darringer, Daniel Gajski, Pat O. Pistilli, Hugo De Man, Carl Harris, James Solomon |
| 2003 | DAC | Automatic communication refinement for system level design. | Samar Abdi, Dongwan Shin, Daniel Gajski |
| 2003 | DATE | RTOS Modeling for System Level Design. | Andreas Gerstlauer, Haobo Yu, Daniel Gajski |
| 2003 | DATE | Transaction Based Design: Another Buzzword or the Solution to a Design Problem? | Heinz-Josef Schlebusch, Gary Smith, Donatella Sciuto, Daniel Gajski, Carsten Mielenz, Christopher K. Lennard, Frank Ghenassia, Stuart Swan, Joachim Kunkel |
| 2002 | DATE | Top-Down System Level Design Methodology Using SpecC, VCC and SystemC. | Lukai Cai, Daniel Gajski, Paul Kritzinger, Mike Olivarez |
| 2002 | ISCAS | Modeling a new RTL semantics in C++. | Shuqing Zhao, Daniel Gajski |
| 2002 | VLSID | Automatic Model Refinement for Fast Architecture Exploration. | Junyu Peng, Samar Abdi, Daniel Gajski |
| 2001 | ASPDAC | Compiling SpecC for simulation. | Jianwen Zhu, Daniel Gajski |
| 2001 | DAC | Panel: The Next HDL: If C++ is the Answer, What was the Question? | Rajesh K. Gupta, Shishpal Rawat, Ingrid Verbauwhede, Grard Berry, Ramesh Chandra, Daniel Gajski, Kris Konigsfeld, Patrick Schaumont |
| 2001 | DATE | C/C++: progress or deadlock in system-level specification. | Daniel Gajski, Eugenio Villar, Wolfgang Rosenstiel, Vassilios Gerousis, D. Barton, Jonas Plantin, S. E. Ericsson, Patrizia Cavalloro, Gjalt G. de Jong |
| 2001 | ISCAS | Introduction of system level architecture exploration using the SpecC methodology. | Lukai Cai, Daniel Gajski, Mike Olivarez |
| 2000 | ASPDAC | Reuse and protection of intellectual property in the SpecC system. | Rainer Dmer, Daniel Gajski |
| 2000 | ASPDAC | Usage-based characterization of complex functional blocks for reuse in behavioral synthesis. | Nong Fan, Viraphol Chaiyakul, Daniel Gajski |
| 2000 | ASPDAC | Embedded tutorial: essential issues for IP reuse. | Daniel Gajski, Allen C.-H. Wu, Viraphol Chaiyakul, Shojiro Mori, Tom Nukiyama, Pierre Bricaud |
| 2000 | ASPDAC | One language or more?: how can we design an SoC at a system level? | Masaharu Imai, Gary Smith, Steven Schulz, Karen Bartleson, Daniel Gajski, Wolfgang Rosenstiel, Peter Flake, Hiroto Yasuura |
| 1999 | DAC | IP-based Design Methodology. | Daniel Gajski |
| 1999 | DAC | Soft Scheduling in High Level Synthesis. | Jianwen Zhu, Daniel Gajski |
| 1999 | DATE | OpenJ: An Extensible System Level Design Language. | Jianwen Zhu, Daniel Gajski |
| 1998 | DAC | System-level exploration with SpecSyn. | Daniel Gajski, Frank Vahid, Sanjiv Narayan, Jie Gong |
| 1997 | DAC | Hardware/Software Partitioning and Pipelining. | Smita Bakshi, Daniel Gajski |
| 1996 | ICCAD | Clock-driven performance optimization in interactive behavioral synthesis. | Hsiao-Ping Juan, Daniel Gajski, Viraphol Chaiyakul |
| 1996 | ICCD | Opportunities and pitfalls in HDL-based system design. | Rajesh K. Gupta, Daniel Gajski, Randy Allen, Yatin Trivedi |
| 1995 | DAC | Interfacing Incompatible Protocols Using Interface Process Generation. | Sanjiv Narayan, Daniel Gajski |
| 1994 | DAC | Protocol Generation for Communication Channels. | Sanjiv Narayan, Daniel Gajski |
| 1993 | DAC | High-Level Transformations for Minimizing Syntactic Variances. | Viraphol Chaiyakul, Daniel Gajski, Loganath Ramachandran |
| 1992 | DAC | Functional Synthesis Using Area and Delay Optimization. | Elke A. Rundensteiner, Daniel Gajski |
| 1992 | DAC | Specification Partitioning for System Design. | Frank Vahid, Daniel Gajski |
| 1992 | ICCAD | An effective methodology for functional pipelining. | Tsing-Fa Lee, Allen C.-H. Wu, Daniel Gajski, Youn-Long Lin |
| 1992 | ICCAD | Accurate layout area and delay modeling for system level design. | Champaka Ramachandran, Fadi J. Kurdahi, Daniel Gajski, Allen C.-H. Wu, Viraphol Chaiyakul |
| 1992 | ICCAD | An efficient multi-view design model for real-time interactive synthesis. | Allen C.-H. Wu, Tedd Hadley, Daniel Gajski |
| 1991 | ICCAD | System Specification and Synthesis with the SpecCharts Language. | Sanjiv Narayan, Frank Vahid, Daniel Gajski |
| 1991 | ICCAD | An Algorithm for Component Selection in Performance Optimized Scheduling. | Loganath Ramachandran, Daniel Gajski |
| 1991 | ICCAD | Obtaining Functionally Equivalent Simulations using VHDL and a Time-Shift Transformation. | Frank Vahid, Daniel Gajski |
| 1991 | ICCAD | Layout-Area Models for High-Level Synthesis. | Allen C.-H. Wu, Viraphol Chaiyakul, Daniel Gajski |
| 1990 | DAC | An Intelligent Component Database for Behavioral Synthesis. | Gwo-Dong Chen, Daniel Gajski |
| 1990 | DAC | An Intermediate Representation for Behavioral Synthesis. | Nikil D. Dutt, Tedd Hadley, Daniel Gajski |
| 1990 | DAC | Percolation Based Synthesis. | Roni Potasman, Joseph Lis, Alexandru Nicolau, Daniel Gajski |
| 1990 | ICCAD | The Component Sythesis Algorithm: Technology Mapping for Register Transfer Descriptions. | Elke A. Rundensteiner, Daniel Gajski, Lubomir Bic |
| 1990 | ICCAD | Partitioning Algorithms for Layout Synthesis from Register-Transfer Netlists. | Allen C.-H. Wu, Daniel Gajski |
| 1989 | DAC | Designer Controlled Behavioral Synthesis. | Nikil D. Dutt, Daniel Gajski |
| 1989 | DAC | VHDL Synthesis Using Structured Modeling. | Joseph Lis, Daniel Gajski |
| 1989 | ICPP | Hypertool: A Programming Aid for Multicomputers. | Min-You Wu, Daniel Gajski |
| 1988 | DAC | MILO: A Microarchitecture and Logic Optimizer. | Nels Vander Zanden, Daniel Gajski |
| 1987 | DAC | Knowledge Based Control in Micro-Architecture Design. | Forrest Brewer, Daniel Gajski |
| 1987 | DAC | LES: A Layout Expert System. | Youn-Long Lin, Daniel Gajski |
| 1987 | DAC | Improving a PLA Area by Pull-Up Transistor Folding. | Chidchanok Lursinsap, Daniel Gajski |
| 1986 | DAC | An expert-system paradigm for design. | Forrest Brewer, Daniel Gajski |
| 1986 | DAC | Flow graph representation. | Alex Orailoglu, Daniel Gajski |
| 1986 | ICPP | CAMP: A Programming Aide for Multiprocessors. | Jih-Kwon Peir, Daniel Gajski |
| 1984 | DAC | Cell compilation with constraints. | Chidchanok Lursinsap, Daniel Gajski |
| 1984 | ISCA | Fast Execution of Loops With IF Statements. | Utpal Banerjee, Daniel Gajski |
| 1984 | ISCA | A Parallel Pipelined Relational Query Processor: An Architectural Overview. | Daniel Gajski, Won Kim, Shinya Fushimi |
| 1983 | ICPP | Cedar : A Large Scale Multiprocessor. | Daniel Gajski, David J. Kuck, Duncan H. Lawrie, Ahmed H. Sameh |