| 2026 | FCCM | Utilising Pipelined Buses to Provide Resource Efficient Dynamic Thread Scheduling in Barrel Scheduled Processors. | Thomas Bain, David B. Thomas, Graeme M. Bragg |
| 2021 | PDP | General hardware multicasting for fine-grained message-passing architectures. | Matthew Naylor, Simon W. Moore, David B. Thomas, Jonathan R. Beaumont, Shane T. Fleming, Mark Vousden, A. Theodore Markettos, Thomas Bytheway, Andrew D. Brown |
| 2020 | IJCNN | A Hardware/Application Overlay Model for Large-Scale Neuromorphic Simulation. | Alexander Rast, Mahyar Shahsavari, Graeme M. Bragg, Mark Vousden, David B. Thomas, Andrew D. Brown |
| 2019 | ARITH | Compile-Time Generation of Custom-Precision Floating-Point IP using HLS Tools. | David B. Thomas |
| 2019 | FCCM | Formalizing Loop-Carried Dependencies in Coq for High-Level Synthesis. | Florian Faissole, George A. Constantinides, David B. Thomas |
| 2019 | FCCM | Templatised Soft Floating-Point for High-Level Synthesis. | David B. Thomas |
| 2019 | FPL | Accelerating Position-Aware Top-k ListNet for Ranking Under Custom Precision Regimes. | Qiang Li, Erwei Wang, Shane T. Fleming, David B. Thomas, Peter Y. K. Cheung |
| 2019 | FPL | Tinsel: A Manythread Overlay for FPGA Clusters. | Matthew Naylor, Simon W. Moore, David B. Thomas |
| 2017 | FCCM | Using Runahead Execution to Hide Memory Latency in High Level Synthesis. | Shane T. Fleming, David B. Thomas |
| 2016 | DAC | StitchUp: automatic control flow protection for high level synthesis circuits. | Shane T. Fleming, David B. Thomas |
| 2016 | FCCM | Increasing Network Size and Training Throughput of FPGA Restricted Boltzmann Machines Using Dropout. | Jiang Su, David B. Thomas, Peter Y. K. Cheung |
| 2016 | FCCM | SynADT: Dynamic Data Structures in High Level Synthesis. | Zeping Xue, David B. Thomas |
| 2016 | SIGMOD | AT-GIS: Highly Parallel Spatial Query Processing with Associative Transducers. | Peter Ogden, David B. Thomas, Peter R. Pietzuch |
| 2015 | ARITH | A General-Purpose Method for Faithfully Rounded Floating-Point Function Approximation in FPGAs. | David B. Thomas |
| 2015 | DATE | Transparent linking of compiled software and synthesized hardware. | David B. Thomas, Shane T. Fleming, George A. Constantinides, Dan R. Ghica |
| 2015 | FCCM | Pipelined Genetic Propagation. | Liucheng Guo, Ce Guo, David B. Thomas, Wayne Luk |
| 2015 | FPGA | System-level Linking of Synthesised Hardware and Compiled Software Using a Higher-order Type System. | Shane T. Fleming, David B. Thomas, George A. Constantinides, Dan R. Ghica |
| 2015 | FPL | PushPush: Seamless integration of hardware and software objects via function calls over AXI. | Shane T. Fleming, Ivan Beretta, David B. Thomas, George A. Constantinides, Dan R. Ghica |
| 2015 | FPL | Recursive pipelined genetic propagation for bilevel optimisation. | Shengjia Shao, Liucheng Guo, Ce Guo, Thomas C. P. Chau, David B. Thomas, Wayne Luk, Stephen Weston |
| 2015 | FPL | SysAlloc: A hardware manager for dynamic memory allocation in heterogeneous systems. | Zeping Xue, David B. Thomas |
| 2014 | FCCM | Compiling Higher Order Functional Programs to Composable Digital Hardware. | Eduardo Aguilar-Pelaez, Samuel Bayliss, Alex I. Smith, Felix Winterstein, Dan R. Ghica, David B. Thomas, George A. Constantinides |
| 2014 | FCCM | FPGA Gaussian Random Number Generators with Guaranteed Statistical Accuracy. | David B. Thomas |
| 2014 | FPL | Heterogeneous Heartbeats: A framework for dynamic management of Autonomous SoCs. | Shane T. Fleming, David B. Thomas |
| 2014 | FPL | Area implications of memory partitioning for high-level synthesis on FPGAs. | Luca Gallo, Alessandro Cilardo, David B. Thomas, Samuel Bayliss, George A. Constantinides |
| 2014 | FPL | Automated framework for FPGA-based parallel genetic algorithms. | Liucheng Guo, David B. Thomas, Ce Guo, Wayne Luk |
| 2013 | FCCM | Parallel Generation of Gaussian Random Numbers Using the Table-Hadamard Transform. | David B. Thomas |
| 2013 | FPL | FPGA based control for real time systems. | Shane T. Fleming, David B. Thomas |
| 2013 | FPL | A fully pipelined FPGA architecture for stochastic simulation of chemical systems. | David B. Thomas, Hideharu Amano |
| 2013 | ICPP | A Heterogeneous Computing Framework for Computational Finance. | Gordon Inggs, David B. Thomas, Wayne Luk |
| 2012 | FPGA | A mixed precision Monte Carlo methodology for reconfigurable accelerator systems. | Gary Chun Tak Chow, Anson Hong Tak Tse, Qiwei Jin, Wayne Luk, Philip Heng Wai Leong, David B. Thomas |
| 2012 | FPL | Parallel FPGA-based all pairs shortest paths for sparse networks: A human brain connectome case study. | Brahim Betkaoui, Yu Wang, David B. Thomas, Wayne Luk |
| 2012 | FPL | Exploring the latency-resource trade-off for the Discrete Fourier Transform on the FPGA. | Gordon Inggs, David B. Thomas, Simon Winberg |
| 2012 | FPL | Optimising explicit finite difference option pricing for dynamic constant reconfiguration. | Qiwei Jin, Tobias Becker, Wayne Luk, David B. Thomas |
| 2011 | FCCM | On Comparing Financial Option Price Solvers on FPGA. | Qiwei Jin, Wayne Luk, David B. Thomas |
| 2011 | FPL | Unifying Finite Difference Option-Pricing for Hardware Acceleration. | Qiwei Jin, Wayne Luk, David B. Thomas |
| 2010 | FPL | FPGA-Optimised Uniform Random Number Generators Using LUTs and Shift Registers. | David B. Thomas, Wayne Luk |
| 2010 | FPL | Reconfigurable Control Variate Monte-Carlo Designs for Pricing Exotic Options. | Anson H. T. Tse, David B. Thomas, Kuen Hung Tsoi, Wayne Luk |
| 2009 | FCCM | FPGA Accelerated Simulation of Biologically Plausible Spiking Neural Networks. | David B. Thomas, Wayne Luk |
| 2009 | FCCM | Accelerating Quadrature Methods for Option Valuation. | Anson H. T. Tse, David B. Thomas, Wayne Luk |
| 2009 | FPGA | A comparison of CPUs, GPUs, FPGAs, and massively parallel processor arrays for random number generation. | David B. Thomas, Lee W. Howes, Wayne Luk |
| 2009 | FPL | Exploring reconfigurable architectures for explicit finite difference option pricing models. | Qiwei Jin, David B. Thomas, Wayne Luk |
| 2009 | HOTI | FPGA Accelerated Low-Latency Market Data Feed Processing. | Gareth W. Morris, David B. Thomas, Wayne Luk |
| 2008 | FCCM | Credit Risk Modelling using Hardware Accelerated Monte-Carlo Simulation. | David B. Thomas, Wayne Luk |
| 2008 | FPGA | FPGA-optimised high-quality uniform random number generators. | David B. Thomas, Wayne Luk |
| 2008 | FPL | Sampling from the exponential distribution using independent Bernoulli variates. | David B. Thomas, Wayne Luk |
| 2007 | FCCM | Sampling from the Multivariate Gaussian Distribution using Reconfigurable Hardware. | David B. Thomas, Wayne Luk |
| 2006 | FCCM | Efficient Hardware Generation of Random Variates with Arbitrary Distributions. | David B. Thomas, Wayne Luk |
| 2006 | FPL | Non-Uniform Random Number Generation Through Piecewise Linear Approximations. | David B. Thomas, Wayne Luk |
| 2004 | FPL | Implementing Graphics Shaders Using FPGAs. | David B. Thomas, Wayne Luk |