Skip to content

Debora Matos

Publication record assembled from the DBLP archive of ranked conferences.

Papers indexed

7

Venues

3

Active years

2009–2015

Best venue rank

A*

Where they publish

Papers

7 indexed papers, newest first.

YearVenueTitleAuthors
2015ISCASPerformance evaluation of hierarchical NoC topologies for stacked 3D ICs.Debora Matos, Max Prass, Mrcio Eduardo Kreutz, Luigi Carro, Altamiro Amadeu Susin
2014ISCASAdaptive multiple switching strategy toward an ideal NoC.Debora Matos, Mrcio Eduardo Kreutz, Cezar Reinbrecht, Luigi Carro, Altamiro Amadeu Susin
2012ISCASFloorplan-aware hierarchical NoC topology with GALS interfaces.Debora Matos, Cezar Reinbrecht, Gianluca Palermo, Jonathan Martinelli, Altamiro Amadeu Susin, Cristina Silvano, Luigi Carro
2011DATEA new reconfigurable clock-gating technique for low power SRAM-based FPGAs.Luca Sterpone, Luigi Carro, Debora Matos, Stephan Wong, F. Fakhar
2011MICROFloorplanning-aware design space exploration for application-specific hierarchical networks on-chip.Debora Matos, Gianluca Palermo, Vittorio Zaccaria, Cezar Reinbrecht, Altamiro Amadeu Susin, Cristina Silvano, Luigi Carro
2010ISCASAssociating packets of heterogeneous cores using a synchronizer wrapper for NoCs.Debora Matos, Luigi Carro, Altamiro Amadeu Susin
2009MICROAdaptive router architecture based on traffic behavior observability.Debora Matos, Caroline Concatto, Anelise Kologeski, Luigi Carro, Fernanda Lima Kastensmidt, Altamiro Amadeu Susin, Mrcio Eduardo Kreutz