| 2013 | DAC | A transmission gate physical unclonable function and on-chip voltage-to-digital conversion technique. | Raj Chakraborty, Charles Lamech, Dhruva Acharyya, Jim Plusquellic |
| 2011 | DAC | Characterizing within-die and die-to-die delay variations introduced by process variations and SOI history effect. | Jim Aarestad, Charles Lamech, Jim Plusquellic, Dhruva Acharyya, Kanak Agarwal |
| 2011 | ITC | Architecture and implementation of a truly parallel ATE capable of measuring pico ampere level current. | Dhruva Acharyya, Kosuke Miyao, David Ting, Daniel Lam, Robert Smith, Pete Fitzpatrick, Brian Buras, John Williamson |
| 2010 | DAC | Quality metric evaluation of a physical unclonable function derived from an IC's power distribution system. | Ryan Helinski, Dhruva Acharyya, Jim Plusquellic |
| 2010 | ITC | Leveraging existing power control circuits and power delivery architecture for variability measurement. | Dhruva Acharyya, Kanak Agarwal, Jim Plusquellic |
| 2009 | DAC | A physical unclonable function defined using power distribution system equivalent resistance variations. | Ryan Helinski, Dhruva Acharyya, Jim Plusquellic |
| 2009 | ICCAD | Characterizing within-die variation from multiple supply port IDDQ measurements. | Kanak Agarwal, Dhruva Acharyya, Jim Plusquellic |
| 2005 | VTS | Hardware Results Demonstrating Defect Detection Using Power Supply Signal Measurements. | Dhruva Acharyya, Jim Plusquellic |
| 2003 | ITC | Impedance Profile of a Commercial Power Grid and Test System. | Dhruva Acharyya, Jim Plusquellic |