| 2026 | ISCAS | A Clock-Independent, Time-Domain Rapid Calibration Method for Memristor-based Analog Computing AI Processors. | Junzhe Chen, Matthew Schormans, Zhiqiang Que, Dinesh Pamunuwa, Jiayang Li |
| 2025 | DATE | Nanoelectromechanical Binary Comparator for Edge-Computing Applications. | Victor Marot, Manu Bala Krishnan, Mukesh Kumar Kulsreshath, Elliott Worsey, Roshan Weerasekera, Dinesh Pamunuwa |
| 2025 | ISCAS | Nanomechanical Relay-based Switchblock For FPGA Interconnect. | Victor Marot, Dinesh Pamunuwa |
| 2025 | ISCAS | Measurement and Analysis of Dynamic Energy Consumption in Microelectromechanical Relays. | Qi Tang, Elliott Worsey, Mukesh Kumar Kulsreshath, Yue Fan, Yingying Li, Simon J. Bleiker, Harold M. H. Chong, Frank Niklaus, Dinesh Pamunuwa |
| 2024 | ISCAS | Nanoelectromechanical analog-to-digital converter for low power and harsh environments. | Elliott Worsey, Qi Tang, Manu Bala Krishnan, Mukesh Kumar Kulsreshath, Dinesh Pamunuwa |
| 2015 | ICCAD | Design Methodologies, Models and Tools for Very-Large-Scale Integration of NEM Relay-Based Circuits. | Tian Qin, Sunil Rana, Dinesh Pamunuwa |
| 2013 | ISCAS | Modelling NEM relays for digital circuit applications. | Sunil Rana, Tian Qin, Dinesh Pamunuwa, Daniel Grogg, Michel Despont, Yu Pu, Christoph Hagleitner |
| 2011 | ICCAD | Modeling the computational efficiency of 2-D and 3-D silicon processors for early-chip planning. | Matthew Grange, Axel Jantsch, Roshan Weerasekera, Dinesh Pamunuwa |
| 2010 | DATE | On signalling over Through-Silicon Via (TSV) interconnects in 3-D Integrated Circuits. | Roshan Weerasekera, Matt Grange, Dinesh Pamunuwa, Hannu Tenhunen |
| 2009 | ISCAS | Design of Robust Molecular Electronic Circuits. | Ci Lei, Dinesh Pamunuwa, Steven Bailey, Colin Lambert |
| 2008 | DATE | Memory Technology for Extended Large-Scale Integration in Future Electronics Applications. | Dinesh Pamunuwa |
| 2007 | ICCAD | Extending systems-on-chip to the third dimension: performance, cost and technological tradeoffs. | Roshan Weerasekera, Li-Rong Zheng, Dinesh Pamunuwa, Hannu Tenhunen |
| 2007 | VLSID | Delay-Balanced Smart Repeaters for On-Chip Global Signaling. | Roshan Weerasekera, Dinesh Pamunuwa, Li-Rong Zheng, Hannu Tenhunen |
| 2003 | ICCAD | Analytic Modeling of Interconnects for Deep Sub-Micron Circuits. | Dinesh Pamunuwa, Shauki Elassaad, Hannu Tenhunen |
| 2003 | ISCAS | A global wire planning scheme for Network-on-Chip. | Jian Liu, Li-Rong Zheng, Dinesh Pamunuwa, Hannu Tenhunen |
| 2003 | ISCAS | Closed form metrics to accurately model the response in general arbitrarily-coupled RC trees. | Dinesh Pamunuwa, Shauki Elassaad |
| 2002 | ISCAS | Optimising bandwidth over deep sub-micron interconnect. | Dinesh Pamunuwa, Li-Rong Zheng, Hannu Tenhunen |
| 2002 | ISCAS | On dynamic delay and repeater insertion. | Hannu Tenhunen, Dinesh Pamunuwa |
| 2001 | VLSID | Repeater Insertion To Minimise Delay In Coupled Interconnects. | Dinesh Pamunuwa, Hannu Tenhunen |
| 2000 | ISCAS | Combating digital noise in high speed ULSI circuits using binary BCH encoding. | Dinesh Pamunuwa, Li-Rong Zheng, Hannu Tenhunen |