| 2025 | FPL | Design Space Exploration of Fast RISC-V Processors for Scalable Kilo-Core FPGA Systems. | Riadh Ben Abdelhamid, Vladislav Vlek, Kevin Klein, Dirk Koch |
| 2025 | FPL | Virtualization and Dynamic Reconfiguration of Custom Instruction Accelerators (CIA) in RISC-V Embedded Systems. | Bea Healy, Brandon Freiberger, Jonas Kuenstler, King Lok Chung, Emil Cozac, Meinhard Kissich, Gennadiy Knis, Ron Sass, Dirk Koch, Jan Gray, Guy Lemieux |
| 2025 | FPL | FPGAs with FABulous - Framework and Chips. | Dirk Koch, Myrtle Shah, King Lok Chung, Jonas Kuenstler, Marcel Jung, Jakob Ternes, Asma Mohsin, Gennadiy Knis |
| 2024 | FCCM | Ph.D. Project: ManAge: A Tool for Timing Characterization of FPGAs. | Bardia Babaei, Dirk Koch |
| 2023 | FPL | Efficient Resource Scheduling for Runtime Reconfigurable Systems on FPGAs. | Shaden M. Alismail, Dirk Koch |
| 2023 | FPL | FABulous Demo: Open Source FPGA on Sky130. | Myrtle Shah, Jakob Ternes, Dirk Koch |
| 2022 | FPGA | How to Shrink My FPGAs - Optimizing Tile Interfaces and the Configuration Logic in FABulous FPGA Fabrics. | King Lok Chung, Nguyen Dao, Jing Yu, Dirk Koch |
| 2022 | FPL | Tunable Fine-grained Clock Phase-shifting for FPGAs. | Bardia Babaei, Dirk Koch |
| 2022 | FPL | Precise Characterizing of FPGAs in Production Systems. | Bardia Babaei, Dirk Koch |
| 2022 | FPL | FPL Demo: Runtime Stream Processing with Resource-Elastic Pipelines on FPGAs. | Kaspar Mtas, Kristiyan Manev, Joseph Powell, Dirk Koch |
| 2022 | FPL | FPL Demo: FPGA Bitstream Virus Scanning. | Joseph Powell, Kaspar Matas, Kristiyan Manev, Dirk Koch |
| 2021 | FCCM | Trusted Configuration in Cloud FPGAs. | Shaza Zeitouni, Jo Vliegen, Tommaso Frassetto, Dirk Koch, Ahmad-Reza Sadeghi, Nele Mentens |
| 2021 | FPGA | FABulous: An Embedded FPGA Framework. | Dirk Koch, Nguyen Dao, Bea Healy, Jing Yu, Andrew Attwood |
| 2021 | FPL | The FABulous Open eFPGA Ecosystem in Action - From Specifications to Chips to Running Bitsteams. | Jing Yu, Andrew Attwood, Nguyen Dao, Dirk Koch |
| 2021 | ISCAS | Memristor-Based Pass Gate for FPGA Programmable Routing Switch. | Nguyen Cong Dao, Dirk Koch |
| 2020 | FCCM | Power-hammering through Glitch Amplification - Attacks and Mitigation. | Kaspar Matas, Tuan Minh La, Khoa Dang Pham, Dirk Koch |
| 2020 | FPGA | Invited Tutorial: FPGA Hardware Security for Datacenters and Beyond. | Kaspar Matas, Tuan La, Nikola Grunchevski, Khoa Dang Pham, Dirk Koch |
| 2020 | FPL | Securing FPGA Accelerators at the Electrical Level for Multi-tenant Platforms. | Tuan La, Kaspar Matas, Khoa Dang Pham, Dirk Koch |
| 2020 | FPL | Demo: A Closer Look at Malicious Bitstreams. | Tuan La, Kaspar Matas, Joseph Powell, Khoa Dang Pham, Dirk Koch |
| 2020 | FPL | Resource Elastic Database Acceleration. | Kristiyan Manev, Dirk Koch |
| 2020 | FPL | Transparent Integration of a Dynamic FPGA Database Acceleration System. | Kaspar Mtas, Dirk Koch |
| 2020 | FPL | A Self-Compilation Flow Demo on FOS - The FPGA Operating System. | Khoa Dang Pham, Anuj Vaishnav, Joseph Powell, Dirk Koch |
| 2019 | FCCM | EFCAD - An Embedded FPGA CAD Tool Flow for Enabling On-chip Self-Compilation. | Khoa Dang Pham, Malte Vesper, Dirk Koch, Eddie Hung |
| 2019 | FPL | The FOS (FPGA Operating System) Demo. | Anuj Vaishnav, Khoa Dang Pham, Kristiyan Manev, Dirk Koch |
| 2018 | FPL | A Survey on FPGA Virtualization. | Anuj Vaishnav, Khoa Dang Pham, Dirk Koch |
| 2018 | FPL | Resource Elastic Virtualization for FPGAs Using OpenCL. | Anuj Vaishnav, Khoa Dang Pham, Dirk Koch, James D. Garside |
| 2017 | DATE | BITMAN: A tool and API for FPGA bitstream manipulations. | Khoa Dang Pham, Edson L. Horta, Dirk Koch |
| 2017 | FPL | Asynchronous interface FIFO design on FPGA for high-throughput NRZ synchronisation. | Gengting Liu, Jim D. Garside, Steve B. Furber, Luis A. Plana, Dirk Koch |
| 2017 | FPL | Making a case for an ARM Cortex-A9 CPU interlay replacing the NEON SIMD unit. | Jose Raul Garcia Ordaz, Dirk Koch |
| 2017 | FPL | A security library for FPGA interlays. | Anuj Vaishnav, Jose Raul Garcia Ordaz, Dirk Koch |
| 2016 | DATE | ECOSCALE: Reconfigurable computing and runtime system for future exascale systems. | Iakovos Mavroidis, Ioannis Papaefstathiou, Luciano Lavagno, Dimitrios S. Nikolopoulos, Dirk Koch, John Goodacre, Ioannis Sourdis, Vassilis Papaefstathiou, Marcello Coppola, Manuel Palomino |
| 2016 | FCCM | Parallel Hardware Merge Sorter. | Wei Song, Dirk Koch, Mikel Lujn, Jim D. Garside |
| 2016 | FPL | JetStream: An open-source high-performance PCI Express 3 streaming library for FPGA-to-Host and FPGA-to-FPGA communication. | Malte Vesper, Dirk Koch, Kizheppatt Vipin, Suhaib A. Fahmy |
| 2016 | FPL | A partial reconfiguration controller for Altera Stratix V FPGAs. | Zhenzhong Xiao, Dirk Koch, Mikel Lujn |
| 2015 | FCCM | Rapid Overlay Builder for Xilinx FPGAs. | Michael Xi Yue, Dirk Koch, Guy G. F. Lemieux |
| 2015 | FPL | Placing partially reconfigurable stream processing applications on FPGAs. | Nicolae Bogdan Grigore, Dirk Koch |
| 2014 | FPL | Portable module relocation and bitstream compression for Xilinx FPGAs. | Christian Beckhoff, Dirk Koch, Jim Trresen |
| 2014 | FPL | Hierarchical reconfiguration of FPGAs. | Dirk Koch, Christian Beckhoff |
| 2013 | FPL | Building partial systems with GoAhead. | Christian Beckhoff, Alexander Wold, Anders Fritzell, Dirk Koch, Jim Trresen |
| 2013 | FPL | An efficient FPGA overlay for portable custom instruction set extensions. | Dirk Koch, Christian Beckhoff, Guy G. F. Lemieux |
| 2013 | FPL | Remote FPGA design through eDiViDe - European Digital Virtual Design Lab. | Jochen Vandorpe, Jo Vliegen, Ruben Smeets, Nele Mentens, Milos Drutarovsk, Michal Varchola, Kerstin Lemke-Rust, Paul Plger, Peter Samarin, Dirk Koch, Yngve Hafting, Jim Trresen |
| 2012 | DDECS | Design techniques for increasing performance and resource utilization of reconfigurable soft CPUs. | Alexander Wold, Dirk Koch, Jim Trresen |
| 2012 | FCCM | Go Ahead: A Partial Reconfiguration Framework. | Christian Beckhoff, Dirk Koch, Jim Trresen |
| 2011 | FPGA | FPGASort: a high performance sorting architecture exploiting run-time reconfiguration on fpgas for large problem sorting. | Dirk Koch, Jim Trresen |
| 2011 | FPL | A Routing Architecture for Mapping Dataflow Graphs at Run-Time. | Dirk Koch, Jim Trresen |
| 2010 | FCCM | Fine-Grained Partial Runtime Reconfiguration on Virtex-5 FPGAs. | Dirk Koch, Christian Beckhoff, Jim Trresen |
| 2010 | FPL | Short-Circuits on FPGAs Caused by Partial Runtime Reconfiguration. | Christian Beckhoff, Dirk Koch, Jim Trresen |
| 2010 | FPL | A Bus-Based SoC Architecture for Flexible Module Placement on Reconfigurable FPGAs. | Andreas Oetken, Stefan Wildermann, Jrgen Teich, Dirk Koch |
| 2009 | FCCM | Minimizing Internal Fragmentation by Fine-Grained Two-Dimensional Module Placement for Runtime Reconfiguralble Systems. | Dirk Koch, Christian Beckhoff, Jrgen Teich |
| 2009 | FPGA | A communication architecture for complex runtime reconfigurable systems and its implementation on spartan-3 FPGAs. | Dirk Koch, Christian Beckhoff, Jrgen Teich |
| 2008 | FCCM | Efficient Reconfigurable On-Chip Buses for FPGAs. | Dirk Koch, Christian Haubelt, Jrgen Teich |
| 2008 | FPL | No-break dynamic defragmentation of reconfigurable devices. | Sndor P. Fekete, Tom Kamphans, Nils Schweer, Christopher Tessars, Jan van der Veen, Josef Angermeier, Dirk Koch, Jrgen Teich |
| 2008 | FPL | ReCoBus-Builder - A novel tool and technique to build statically and dynamically reconfigurable systems for FPGAS. | Dirk Koch, Christian Beckhoff, Jrgen Teich |
| 2007 | FPGA | Efficient hardware checkpointing: concepts, overhead analysis, and implementation. | Dirk Koch, Christian Haubelt, Jrgen Teich |
| 2007 | ISCAS | Modeling and Synthesis of Hardware-Software Morphing. | Dirk Koch, Christian Haubelt, Thilo Streichert, Jrgen Teich |
| 2004 | FPL | A Dynamic NoC Approach for Communication in Reconfigurable Devices. | Christophe Bobda, Mateusz Majer, Dirk Koch, Ali Ahmadinia, Jrgen Teich |
| 2004 | FPL | Preemptive Hardware Task Management. | Dirk Koch |