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Dominique Borrione

Publication record assembled from the DBLP archive of ranked conferences.

Papers indexed

19

Venues

9

Active years

1982–2017

Best venue rank

A*

Where they publish

Papers

19 indexed papers, newest first.

YearVenueTitleAuthors
2017MEMOCODEExtraction of missing formal assumptions in under-constrained designs.Guillaume Plassan, Katell Morin-Allory, Dominique Borrione
2015FDLEnabler-based synchronizer model for clock domain crossing static verification.Mejid Kebaili, Katell Morin-Allory, Jean-Christophe Brignone, Dominique Borrione
2013FDLApplication of formal methods for design space exploration and refinement.Dominique Borrione, Ashraf M. Salem
2013MEMOCODEFast prototyping from assertions: A pragmatic approach.Katell Morin-Allory, Fatemeh Negin Javaheri, Dominique Borrione
2009DDECSHigh-level symbolic simulation for automatic model extraction.Florent Ouchet, Dominique Borrione, Katell Morin-Allory, Laurence Pierre
2008MEMOCODEAssertion-Based Design with Horus.Yann Oddos, Katell Morin-Allory, Dominique Borrione
2007DDECSPrototyping Generators for On-line Test Vector Generation Based on PSL Properties.Yann Oddos, Katell Morin-Allory, Dominique Borrione
2007FDLAsynchronous online-monitoring of logical and temporal assertions.Katell Morin-Allory, Laurent Fesquet, Benjamin Roustan, Dominique Borrione
2006DATEProven correct monitors from PSL specifications.Katell Morin-Allory, Dominique Borrione
2006FDLOn-line Monitoring of Properties Built on Regular Expressions.Katell Morin-Allory, Dominique Borrione
2006RSPAsynchronous Assertion Monitors for multi-Clock Domain System Verification.Katell Morin-Allory, Laurent Fesquet, Dominique Borrione
2004FMCADA Functional Approach to the Formal Specification of Networks on Chip.Julien Schmaltz, Dominique Borrione
2003FDLModeling CHP descriptions in Labeled Transitions Systems for an efficient formal validation of asynchronous circuit specifications.Dominique Borrione, Menouer Boubekeur
2002DATEFormal Verification Techniques: Industrial Status and Perspectives.Joel Blasquez, Marten van Hulst, Andrea Fedeli, Jean-Luc Lambert, Dominique Borrione, Coby Hanoch, Pierre Bricaud
2001ISCASOn the use of don't cares during symbolic reachability analysis.Sherief Reda, Ayman Wahba, Ashraf Salem, Dominique Borrione, M. Ghonaimy
1997DATEConnection error location and correction in combinational circuits.Ayman M. Wahba, Dominique Borrione
1996FMCADHDL-Based Integration of Formal Methods and CAD Tools in the PREVAIL Environment.Dominique Borrione, H. Bouamama, David Dharbe, C. Le Faou, Ayman M. Wahba
1988ICCDA functional approach to formal hardware verification: the MTI experience.Dominique Borrione, Paolo Camurati, J. L. Paillet, Paolo Prinetto
1982DACThe conlan project: Status and future plans.Robert Piloty, Dominique Borrione