| 2015 | ICCAD | Statistical Learning in Chip (SLIC). | Ronald D. Blanton, Xin Li, Ken Mai, Diana Marculescu, Radu Marculescu, Jeyanandh Paramesh, Jeff G. Schneider, Donald E. Thomas |
| 2010 | DATE | Cost-effective slack allocation for lifetime improvement in NoC-based MPSoCs. | Brett H. Meyer, Adam S. Hartman, Donald E. Thomas |
| 2007 | DAC | Shared Resource Access Attributes for High-Level Contention Models. | Alex Bobrek, JoAnn M. Paul, Donald E. Thomas |
| 2004 | DAC | High level cache simulation for heterogeneous multiprocessors. | Joshua J. Pieper, Alain Mellan, JoAnn M. Paul, Donald E. Thomas, Faraydon Karim |
| 2004 | DATE | Modeling Shared Resource Contention Using a Hybrid Simulation/Analytical Approach. | Alex Bobrek, Joshua J. Pieper, Jeffrey E. Nelson, JoAnn M. Paul, Donald E. Thomas |
| 2003 | DAC | Schedulers as model-based design elements in programmable heterogeneous multiprocessors. | JoAnn M. Paul, Alex Bobrek, Jeffrey E. Nelson, Joshua J. Pieper, Donald E. Thomas |
| 2003 | DATE | Layered, Multi-Threaded, High-Level Performance Design. | Andrew S. Cassidy, JoAnn M. Paul, Donald E. Thomas |
| 2002 | DATE | A Layered, Codesign Virtual Machine Approach to Modeling Computer Systems. | JoAnn M. Paul, Donald E. Thomas |
| 2000 | DAC | Unifying behavioral synthesis and physical design. | William E. Dougherty, Donald E. Thomas |
| 2000 | DAC | A codesign virtual machine for hierarchical, balanced hardware/software system modeling. | JoAnn M. Paul, Simon N. Peffers, Donald E. Thomas |
| 1999 | DAC | Vertical Benchmarks for CAD. | Christopher Inacio, Herman Schmit, David Nagle, Andrew Ryan, Donald E. Thomas, Yingfai Tong, Ben Klass |
| 1999 | ICCD | An Environment for Exploring Low Power Memory Configurations in System Level Design. | Sari L. Coumeri, Donald E. Thomas |
| 1999 | ISLPED | Modeling and automating selection of guarding techniques for datapath elements. | William E. Dougherty, Donald E. Thomas |
| 1998 | FPGA | Managing Pipeline-Reconfigurable FPGAs. | Srihari Cadambi, Jeffrey Weener, Seth Copen Goldstein, Herman Schmit, Donald E. Thomas |
| 1998 | ISLPED | Memory modeling for system synthesis. | Sari L. Coumeri, Donald E. Thomas |
| 1996 | DAC | The Design of Mixed Hardware/Software Systems. | Jay K. Adams, Donald E. Thomas |
| 1995 | DAC | Multi-way Partitioning for Minimum Delay for Look-Up Table Based FPGAs. | Prashant Sawkar, Donald E. Thomas |
| 1995 | FCCM | Hidden Markov modeling and fuzzy controllers in FPGAs. | Herman Schmit, Donald E. Thomas |
| 1995 | ICCAD | Address generation for memories containing multiple arrays. | Herman Schmit, Donald E. Thomas |
| 1995 | ICCD | Execution-time profiling for multiple-process behavioral synthesis. | Jay K. Adams, John Alan Miller, Donald E. Thomas |
| 1994 | DAC | The Attributed-Behavior Abstraction and Synthesis Tools. | Lawrence F. Arnstein, Donald E. Thomas |
| 1994 | ITC | Behavioral-Test Generation using Mixed-Integer Non-linear Programming. | R. S. Ramchandani, Donald E. Thomas |
| 1993 | DAC | Synthesis of Pipelined Instruction Set Processors. | Richard J. Cloutier, Donald E. Thomas |
| 1993 | DAC | Performance Directed Technology Mapping for Look-Up Table Based FPGAs. | Prashant Sawkar, Donald E. Thomas |
| 1993 | ICCAD | A general consistency technique for increasing the controllability of high level synthesis tools. | Lawrence F. Arnstein, Donald E. Thomas |
| 1992 | DAC | Area and Delay Mapping for Table-Look-Up Based Field Programmable Gate Arrays. | Prashant Sawkar, Donald E. Thomas |
| 1992 | ICCD | Addressing the Tradeoff Between Standard and Custom ICs in System Level Design. | Jay K. Adams, Donald E. Thomas |
| 1990 | DAC | The Combination of Scheduling, Allocation, and Mapping in a Single Algorithm. | Richard J. Cloutier, Donald E. Thomas |
| 1990 | ICCAD | Exploiting the Special Structure of Conflict and Compatibility Graphs in High-Level Synthesis. | David Springer, Donald E. Thomas |
| 1989 | DAC | Architectural Partitioning for System Level Design. | Elizabeth D. Lagnese, Donald E. Thomas |
| 1988 | DAC | CORAL II: Linking Behavior and Structure in an IC Design System. | Robert L. Blackburn, Donald E. Thomas, Patti M. Koenig |
| 1988 | DAC | The System Architect's Workbench. | Donald E. Thomas, Elizabeth M. Dirkes, Robert A. Walker, Jayanth V. Rajan, John A. Nestor, Robert L. Blackburn |
| 1985 | DAC | Linking the behavioral and structural dominis of representation in a synthesis system. | Robert L. Blackburn, Donald E. Thomas |
| 1985 | DAC | The VLSI design automation assistant: what's in a knowledge base. | Thaddeus J. Kowalski, Donald E. Thomas |
| 1985 | DAC | Synthesis by delayed binding of decisions. | Jayanth V. Rajan, Donald E. Thomas |
| 1985 | DAC | A model of design representation and synthesis. | Robert A. Walker, Donald E. Thomas |
| 1983 | DAC | A method of automatic data path synthesis. | Charles Y. Hitchcock III, Donald E. Thomas |
| 1983 | DAC | The VLSI Design Automation Assistant: Prototype system. | Thaddeus J. Kowalski, Donald E. Thomas |
| 1983 | DAC | Behavioral level transformation in the CMU-DA system. | Robert A. Walker, Donald E. Thomas |
| 1982 | DAC | Defining and implementing a multilevel design representation with simulation applications. | John A. Nestor, Donald E. Thomas |
| 1981 | DAC | A technology relative Logic Synthesis and Module Selection system. | Gary W. Leive, Donald E. Thomas |
| 1979 | DAC | The CMU design automation system: An example of automated data path design. | Alice C. Parker, Donald E. Thomas, Daniel P. Siewiorek, Mario Barbacci, Louis J. Hafer, Gary W. Leive, Jinchoon Kim |
| 1978 | DAC | A technology-relative computer-aided design system: Abstract representations, transformations, and design tradeoffs. | Edward A. Snow, Daniel P. Siewiorek, Donald E. Thomas |
| 1977 | DAC | Measuring designer performance to verify design automation systems. | Donald E. Thomas, Daniel P. Siewiorek |