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Dragomir Milojevic

Publication record assembled from the DBLP archive of ranked conferences.

Papers indexed

23

Venues

13

Active years

2005–2026

Best venue rank

A*

Where they publish

Papers

23 indexed papers, newest first.

YearVenueTitleAuthors
2026DATEFocus Session: Advanced CMOS and 5.5D Packaging: Perspectives and Challenges for Design, Reliability and Security.Hussam Amrouch, Dragomir Milojevic, Giorgio Di Natale, Jrme Toublanc
2024DACGNN-assisted Back-side Clock Routing Methodology for Advance Technologies.Nesara Eranna Bethur, Pruek Vanna-Iampikul, Odysseas Zografos, Lingjun Zhu, Giuliano Sisto, Dragomir Milojevic, Alberto Garca Ortiz, Geert Hellings, Julien Ryckaert, Francky Catthoor, Sung Kyu Lim
2024ISCAS3D Partitioning with Pipeline Optimization for Low-Latency Memory Access in Many-Core SoCs.Sudipta Das, Samuel Riedel, Marco Bertuletti, Luca Benini, Moritz Brunion, Julien Ryckaert, James Myers, Dwaipayan Biswas, Dragomir Milojevic
2022DATEMemPool-3D: Boosting Performance and Efficiency of Shared-L1 Memory Many-Core Clusters with 3D Integration.Matheus A. Cavalcante, Anthony Agnesina, Samuel Riedel, Moritz Brunion, Alberto Garca-Ortiz, Dragomir Milojevic, Francky Catthoor, Sung Kyu Lim, Luca Benini
2022GECCOEspresso to the rescue of genetic programming facing exponential complexity.Nicolas Potvin, Hugues Bersini, Dragomir Milojevic
2022ISLPEDHier-3D: A Hierarchical Physical Design Methodology for Face-to-Face-Bonded 3D ICs.Anthony Agnesina, Moritz Brunion, Alberto Garca Ortiz, Francky Catthoor, Dragomir Milojevic, Manu Komalan, Matheus A. Cavalcante, Samuel Riedel, Luca Benini, Sung Kyu Lim
2021ISLPEDPower, Performance, Area and Cost Analysis of Memory-on-Logic Face-to-Face Bonded 3D Processor Designs.Anthony Agnesina, Moritz Brunion, Jinwoo Kim, Alberto Garca Ortiz, Dragomir Milojevic, Francky Catthoor, Manu Perumkunnil, Sung Kyu Lim
2019ISCAS3D-Stacked Integrated Circuits: How Fine Should System Partitioning Be?Quentin Delhaye, Dragomir Milojevic, Jol Goossens
2017ICCADIR-drop aware Design & technology co-optimization for N5 node with different device and cell height options.Luca Mattii, Dragomir Milojevic, Peter Debacker, Yasser Sherazi, Mladen Berekovic, Praveen Raghavan
2016DATEEnergy minimization at all layers of the data center: The ParaDIME project.Oscar Palomar, Santhosh Kumar Rethinagiri, Gulay Yalcin, J. Rubn Titos Gil, Pablo Prieto, Emma Torrella, Osman S. Unsal, Adrin Cristal, Pascal Felber, Anita Sobe, Yaroslav Hayduk, Mascha Kurpicz, Christof Fetzer, Thomas Knauth, Malte Schneega, Jens Struckmeier, Dragomir Milojevic
2016ICCADHow much cost reduction justifies the adoption of monolithic 3D ICs at 7nm node?Bon Woong Ku, Peter Debacker, Dragomir Milojevic, Praveen Raghavan, Sung Kyu Lim
2016ISLPEDPhysical Design Solutions to Tackle FEOL/BEOL Degradation in Gate-level Monolithic 3D ICs.Bon Woong Ku, Peter Debacker, Dragomir Milojevic, Praveen Raghavan, Diederik Verkest, Aaron Thean, Sung Kyu Lim
2016PDPExploring Energy Reduction in Future Technology Nodes via Voltage Scaling with Application to 10nm.Gulay Yalcin, Santhosh Kumar Rethinagiri, Oscar Palomar, Osman S. nsal, Adrin Cristal, Dragomir Milojevic
2014RTCSAA context aware cache controller to bridge the gap between theory and practice in real-time systems.Yannick Allard, Geoffrey Nelissen, Jol Goossens, Dragomir Milojevic
2013ASPDACDesign issues in heterogeneous 3D/2.5D integration.Dragomir Milojevic, Pol Marchal, Erik Jan Marinissen, Geert Van der Plas, Diederik Verkest, Eric Beyne
2013DATEPanel: "will 3D-IC remain a technology of the future... even in the future?".Marco Casale-Rossi, Patrick Leduc, Giovanni De Micheli, Patrick Blouet, Brendan Farley, Anna Fontanelli, Dragomir Milojevic, Steve Smith
2012ECRTSTechniques Optimizing the Number of Processors to Schedule Multi-threaded Tasks.Geoffrey Nelissen, Vandy Berten, Jol Goossens, Dragomir Milojevic
2012ECRTSU-EDF: An Unfair But Optimal Multiprocessor Scheduling Algorithm for Sporadic Tasks.Geoffrey Nelissen, Vandy Berten, Vincent Nlis, Jol Goossens, Dragomir Milojevic
2012ICCDThermal characterization of cloud workloads on a power-efficient server-on-chip.Dragomir Milojevic, Sachin Idgunji, Djordje Jevdjic, Emre Ozer, Pejman Lotfi-Kamran, Andreas Panteli, Andreas Prodromou, Chrysostomos Nicopoulos, Damien Hardy, Babak Falsafi, Yiannakis Sazeides
2011DATEAn analytical compact model for estimation of stress in multiple Through-Silicon Via configurations.Geert Eneman, J. Cho, V. Moroz, Dragomir Milojevic, M. Choi, Kristin De Meyer, Abdelkarim Mercha, Eric Beyne, Thomas Hoffmann, Geert Van der Plas
2011RTCSAReducing Preemptions and Migrations in Real-Time Multiprocessor Scheduling Algorithms by Releasing the Fairness.Geoffrey Nelissen, Vandy Berten, Jol Goossens, Dragomir Milojevic
2008OPODISPower-Aware Real-Time Scheduling upon Dual CPU Type Multiprocessor Platforms.Jol Goossens, Dragomir Milojevic, Vincent Nlis
2005FPLImplementation of Ranking Filters on General Purpose and Reconfigurable Architecture Based on High Density FPGA Devices.Dragomir Milojevic