Eby G. Friedman

Publication record assembled from the DBLP archive of ranked conferences.

Papers indexed

106

Venues

Active years

1993–2025

Best venue rank

Where they publish

Papers

106 indexed papers, newest first.

Year	Venue	Title	Authors
2025	ISCAS	Network-on-Interposer Co-Design for Heterogeneous Chiplet-Based Integrated Systems.	Andres Ayes, Eby G. Friedman, Marilyn Wolf
2025	ISCAS	Partitioning SFQ Circuits for Serial Biasing in Heterogeneous Circuits.	Tejumadejesu Oluwadamilare, Eby G. Friedman
2022	ISCAS	Double Magnetic Tunnel Junction-Based Nonvolatile Logic.	Abdelrahman G. Qoutb, Eby G. Friedman
2022	ISCAS	Converter Topologies for On-Package Voltage Stacking.	Nurzhan Zhuldassov, Kan Xu, Eby G. Friedman
2021	DAC	SPROUT - Smart Power ROUting Tool for Board-Level Exploration and Prototyping.	Rassul Bairamkulov, Abinash Roy, Mali Nagarajan, Vaishnav Srinivas, Eby G. Friedman
2021	ISCAS	MTJ-Based Dithering for Stochastic Analog-to-Digital Conversion.	Ana Mitrovic, Eby G. Friedman
2020	ISCAS	Graph-Based Power Network Routing for Board-Level High Performance Systems.	Rassul Bairamkulov, Eby G. Friedman, Abinash Roy, Mali Nagarajan, Vaishnav Srinivas
2020	ISCAS	Bias Distribution in ERSFQ VLSI Circuits.	Gleb Krylov, Eby G. Friedman
2020	ISCAS	Spintronic/CMOS-Based Thermal Sensors.	Abdelrahman G. Qoutb, Eby G. Friedman
2020	ISCAS	Multi-Bit CNT TSV for 3-D ICs.	Boris Vaisband, Ange Maurice, Chong Wei Tan, Beng Kang Tay, Eby G. Friedman
2020	ISCAS	Challenges in High Current On-Chip Voltage Stacked Systems.	Kan Xu, Eby G. Friedman
2020	ISCAS	Distributed Port Assignment for Extraction of Power Delivery Networks.	Kan Xu, Eby G. Friedman, Mikhail Popovich, Gregory Sizikov
2020	ISCAS	Cryogenic Dynamic Logic.	Nurzhan Zhuldassov, Eby G. Friedman
2019	ISCAS	PMTJ Temperature Sensor Utilizing VCMA.	Abdelrahman G. Qoutb, Eby G. Friedman
2018	ISCAS	Versatile Framework for Power Delivery Exploration.	Rassul Bairamkulov, Kan Xu, Eby G. Friedman, Mikhail Popovich, Juan Ochoa, Vaishnav Srinivas
2018	ISCAS	Hybrid Write Bias Scheme for Non-Volatile Resistive Crossbar Arrays.	Albert Ciprut, Eby G. Friedman
2018	ISCAS	Behavioral Verilog-A Model of Superconductor-Ferromagnetic Transistor.	Gleb Krylov, Eby G. Friedman
2017	ISCAS	Test point insertion for RSFQ circuits.	Gleb Krylov, Eby G. Friedman
2017	ISCAS	Hybrid energy harvesting in 3-D IC IoT devices.	Boris Vaisband, Eby G. Friedman
2016	ISCAS	Design models of resistive crossbar arrays with selector devices.	Albert Ciprut, Eby G. Friedman
2016	ISCAS	Power noise in 14, 10, and 7 nm FinFET CMOS technologies.	Ravi Patel, Eby G. Friedman, Praveen Raghavan
2016	ISCAS	Layer ordering to minimize TSVs in heterogeneous 3-D ICs.	Boris Vaisband, Eby G. Friedman
2015	ICCD	Architecting a MOS current mode logic (MCML) processor for fast, low noise and energy-efficient computing in the near-threshold regime.	Yuxin Bai, Yanwei Song, Mahdi Nazm Bojnordi, Alexander E. Shapiro, Engin Ipek, Eby G. Friedman
2015	ISCAS	3-D floorplanning algorithm to minimize thermal interactions.	Boris Vaisband, Eby G. Friedman
2015	ISCAS	Inductive coupling effects in large TSV arrays.	Kan Xu, Eby G. Friedman
2014	ISCAS	Field driven STT-MRAM cell for reduced switching latency and energy.	Ravi Patel, Engin Ipek, Eby G. Friedman
2014	ISCAS	Computationally efficient clustering of power supplies in heterogeneous real time systems.	Inna Vaisband, Eby G. Friedman
2014	ISCAS	Thermal conduction path analysis in 3-D ICs.	Boris Vaisband, Ioannis Savidis, Eby G. Friedman
2013	ISCA	AC-DIMM: associative computing with STT-MRAM.	Qing Guo, Xiaochen Guo, Ravi Patel, Engin Ipek, Eby G. Friedman
2013	ISCAS	Current profile of a microcontroller to determine electromagnetic emissions.	Seluk Kse, Eby G. Friedman, Radu M. Secareanu, Olin L. Hartin
2013	ISCAS	Digitally controlled wide range pulse width modulator for on-chip power supplies.	Seluk Kse, Inna Vaisband, Eby G. Friedman
2012	ACSSC	Distributed power delivery for energy efficient and low power systems.	Seluk Kse, Eby G. Friedman
2012	ISCAS	Energy metrics for power efficient crosslink and mesh topologies.	Inna Vaisband, Eby G. Friedman, Ran Ginosar, Avinoam Kolodny
2011	DAC	Fast algorithms for	Seluk Kse, Eby G. Friedman
2011	ICCD	Memristor-based IMPLY logic design procedure.	Shahar Kvatinsky, Avinoam Kolodny, Uri C. Weiser, Eby G. Friedman
2011	ISCAS	Clock distribution models of 3-D integrated systems.	Ioannis Savidis, Vasilis F. Pavlidis, Eby G. Friedman
2010	ISCA	An intra-chip free-space optical interconnect.	Jing Xue, Alok Garg, Berkehan Ciftcioglu, Jianyun Hu, Shang Wang, Ioannis Savidis, Manish Jain, Rebecca Berman, Peng Liu, Michael C. Huang, Hui Wu, Eby G. Friedman, Gary Wicks, Duncan Moore
2010	ISCAS	Globally integrated power and clock distribution network.	Renatas Jakushokas, Eby G. Friedman
2010	ISCAS	Methodology for multi-layer interdigitated power and ground network design.	Renatas Jakushokas, Eby G. Friedman
2010	ISCAS	Compact substrate models for efficient noise coupling and signal isolation analysis.	Renatas Jakushokas, Emre Salman, Eby G. Friedman, Radu M. Secareanu, Olin L. Hartin, Cynthia L. Recker
2010	ISCAS	An area efficient fully monolithic hybrid voltage regulator.	Seluk Kse, Eby G. Friedman
2010	ISCAS	Fast algorithms for power grid analysis based on effective resistance.	Seluk Kse, Eby G. Friedman
2009	ISCAS	Minimizing Noise Via Shield and Repeater Insertion.	Renatas Jakushokas, Eby G. Friedman
2009	ISCAS	Shielding Methodologies in the Presence of Power/Ground Noise.	Seluk Kse, Emre Salman, Eby G. Friedman
2008	ISCAS	Transient simulation of on-chip transmission lines via exact pole extraction.	Guoqing Chen, Eby G. Friedman
2008	ISCAS	Equivalent rise time for resonance in power/ground noise estimation.	Emre Salman, Eby G. Friedman, Radu M. Secareanu, Olin L. Hartin
2008	ISCAS	Input port reduction for efficient substrate extraction in large scale IC's.	Emre Salman, Renatas Jakushokas, Eby G. Friedman, Radu M. Secareanu, Olin L. Hartin
2008	ISCAS	Electrical modeling and characterization of 3-D vias.	Ioannis Savidis, Eby G. Friedman
2007	ICCAD	Efficient placement of distributed on-chip decoupling capacitors in nanoscale ICs.	Mikhail Popovich, Eby G. Friedman, Radu M. Secareanu, Olin L. Hartin
2007	ISCAS	Quasi-Resonant Interconnects: A Low Power Design Methodology.	Jonathan Rosenfeld, Eby G. Friedman
2007	ISCAS	Substrate Noise Reduction Based On Noise Aware Cell Design.	Emre Salman, Eby G. Friedman, Radu M. Secareanu, Olin L. Hartin
2006	ISCAS	Effective capacitance of RLC loads for estimating short-circuit power.	Guoqing Chen, Eby G. Friedman
2006	ISCAS	Optimum wire tapering for minimum power dissipation in RLC interconnects.	Magdy A. El-Moursy, Eby G. Friedman
2006	ISCAS	Via placement for minimum interconnect delay in three-dimensional (3D) circuits.	Vasilis F. Pavlidis, Eby G. Friedman
2006	ISCAS	Design methodology for global resonant H-tree clock distribution networks.	Jonathan Rosenfeld, Eby G. Friedman
2006	ISCAS	On-die decoupling capacitance: frequency domain analysis of activity radius.	Michael Sotman, Avinoam Kolodny, Mikhail Popovich, Eby G. Friedman
2005	ISCAS	Electrical and optical on-chip interconnects in scaled microprocessors.	Guoqing Chen, Hui Chen, Mikhail Haurylau, Nicholas Nelson, Philippe M. Fauchet, Eby G. Friedman, David H. Albonesi
2005	ISCAS	Low power repeaters driving RLC interconnects with delay and bandwidth constraints.	Guoqing Chen, Eby G. Friedman
2005	ISCAS	A Fourier series-based RLC interconnect model for periodic signals.	Guoqing Chen, Eby G. Friedman
2005	ISCAS	Cascode buffer for monolithic voltage conversion operating at high input supply voltages.	Volkan Kursun, Gerhard Schrom, Vivek De, Eby G. Friedman, Siva G. Narendra
2005	ISCAS	Noise coupling in multi-voltage power distribution systems with decoupling capacitors.	Mikhail Popovich, Eby G. Friedman
2005	ISCAS	Managing substrate and interconnect noise from high performance repeater insertion in a mixed-signal environment.	Radu M. Secareanu, Suman K. Banerjee, Olin L. Hartin, Virgilio Fernandez, Eby G. Friedman
2004	ISCAS	Low power flexible Rake receivers for WCDMA.	Boris D. Andreev, Edward L. Titlebaum, Eby G. Friedman
2004	ISCAS	Exponentially tapered H-tree clock distribution networks.	Magdy A. El-Moursy, Eby G. Friedman
2004	ISCAS	Design and simulation of Fractional-N PLL frequency synthesizers.	Mcahit Kozak, Eby G. Friedman
2004	ISCAS	Energy efficient dual threshold voltage dynamic circuits employing sleep switches to minimize subthreshold leakage.	Volkan Kursun, Eby G. Friedman
2004	ISCAS	Forward body biased keeper for enhanced noise immunity in domino logic circuits.	Volkan Kursun, Eby G. Friedman
2004	ISCAS	A low power thyristor-based CMOS programmable delay element.	Junmou Zhang, Simon R. Cooper, Andrew R. LaPietra, Michael W. Mattern, Robert M. Guidash, Eby G. Friedman
2004	ISCAS	Decoupling technique and crosstalk analysis for coupled RLC interconnects.	Junmou Zhang, Eby G. Friedman
2004	ISCAS	Effect of shield insertion on reducing crosstalk noise between coupled interconnects.	Junmou Zhang, Eby G. Friedman
2003	DATE	Reduced Delay Uncertainty in High Performance Clock Distribution Networks.	Dimitrios Velenis, Marios C. Papaefthymiou, Eby G. Friedman
2003	ISCAS	Inductive interconnect width optimization for low power.	Magdy A. El-Moursy, Eby G. Friedman
2003	ISCAS	Electrical characteristics of multi-layer power distribution grids.	Andrey V. Mezhiba, Eby G. Friedman
2002	ISCAS	Large scale clock skew scheduling techniques for improved reliability of digital synchronous VLSI circuits.	Roy Mader, Eby G. Friedman, Ami Litman, Ivan S. Kourtev
2002	ISCAS	Inductance/area/resistance tradeoffs in high performance power distribution grids.	Andrey V. Mezhiba, Eby G. Friedman
2002	ISCAS	A substrate noise circuit for accurately testing mixed-signal ICs.	Weize Xu, Eby G. Friedman
2002	MICRO	Managing static leakage energy in microprocessor functional units.	Steve Dropsho, Volkan Kursun, David H. Albonesi, Sandhya Dwarkadas, Eby G. Friedman
2001	ISCAS	Estimation of transient voltage fluctuations in the CMOS-based power distribution networks.	Kevin T. Tang, Eby G. Friedman
2001	ISCAS	A clock tree topology extraction algorithm for improving the tolerance of clock distribution networks to delay uncertainty.	Dimitrios Velenis, Eby G. Friedman, Marios C. Papaefthymiou
2000	ISCAS	Sensitivity of interconnect delay to on-chip inductance.	Yehea I. Ismail, Eby G. Friedman
2000	ISCAS	Physical design to improve the noise immunity of digital circuits in a mixed-signal smart-power system.	Radu M. Secareanu, Scott Warner, Scott Seabridge, Cathie Burke, Thomas E. Watrobski, Christopher Morton, William Staub, Thomas Tellier, Eby G. Friedman
2000	ISCAS	Delay and power expressions characterizing a CMOS inverter driving an RLC load.	Kevin T. Tang, Eby G. Friedman
2000	ISCAS	Transient analysis of a CMOS inverter driving resistive interconnect.	Kevin T. Tang, Eby G. Friedman
1999	DAC	Effects of Inductance on the Propagation Delay and Repeater Insertion in VLSI Circuits.	Yehea I. Ismail, Eby G. Friedman
1999	DAC	Equivalent Elmore Delay for	Yehea I. Ismail, Eby G. Friedman, Jos Luis Neves
1999	DAC	Maximizing Performance by Retiming and Clock Skew Scheduling.	Xun Liu, Marios C. Papaefthymiou, Eby G. Friedman
1999	DATE	Minimizing Sensitivity to Delay Variations in High-Performance Synchronous Circuits.	Xun Liu, Marios C. Papaefthymiou, Eby G. Friedman
1999	ICCAD	Repeater insertion in tree structured inductive interconnect.	Yehea I. Ismail, Eby G. Friedman, Jos Luis Neves
1999	ICCAD	Clock skew scheduling for improved reliability via quadratic programming.	Ivan S. Kourtev, Eby G. Friedman
1999	ISCAS	Repeater insertion in RLC lines for minimum propagation delay.	Yehea I. Ismail, Eby G. Friedman
1999	ISCAS	Signal waveform characterization in RLC trees.	Yehea I. Ismail, Eby G. Friedman, Jos Luis Neves
1999	ISCAS	A high precision CMOS current mirror/divider.	Radu M. Secareanu, Eby G. Friedman
1999	ISCAS	A universal CMOS voltage interface circuit.	Radu M. Secareanu, Eby G. Friedman, Juan Becerra, Scott Warner
1999	ISCAS	Peak noise prediction in loosely coupled interconnect [VLSI circuits].	Kevin T. Tang, Eby G. Friedman
1998	DAC	Figures of Merit to Characterize the Importance of On-Chip Inductance.	Yehea I. Ismail, Eby G. Friedman, Jos Luis Neves
1998	ISLPED	Power dissipated by CMOS gates driving lossless transmission lines.	Yehea I. Ismail, Eby G. Friedman, Jos Luis Neves
1996	DAC	Optimal Clock Skew Scheduling Tolerant to Process Variations.	Jos Luis Neves, Eby G. Friedman
1995	ISCAS	Minimizing Power Dissipation in Non-Zero Skew-Based Clock Distribution Networks.	Jos Luis Neves, Eby G. Friedman
1995	ISCAS	Monotonicity Constraints on Path Delays for Efficient Retiming with Localized Clock Skew and Variable Register Delay.	Tolga Soyata, Eby G. Friedman, James H. Mulligan Jr.
1994	ICCAD	Retiming with non-zero clock skew, variable register, and interconnect delay.	Tolga Soyata, Eby G. Friedman
1994	ISCAS	Unification of Speed, Power, Area & Reliability in CMOS Tapered Buffer Design.	Brian S. Cherkauer, Eby G. Friedman
1994	ISCAS	Forum: From 100 Milliwatts/MIPS to 10 Microwatts/MIPS.	Eby G. Friedman, Sung-Mo Kang, Eric A. Vittoz, David J. Allstot, Erik P. Harris, Ran-Hong Yan
1994	ISCAS	Circuit Synthesis of Clock Distribution Networks Based on Non-Zero Clock Skew.	Jos Luis Neves, Eby G. Friedman
1993	ISCAS	The Effects of Channel Width Tapering on the Power Dissipation of Serially Connected MOSFETs.	Brian S. Cherkauer, Eby G. Friedman
1993	ISCAS	Clock Distribution Design in VLSI Circuits. An Overview.	Eby G. Friedman
1993	ISCAS	Integration of Clock Skew and Register Delays into a Retiming Algorithm.	Tolga Soyata, Eby G. Friedman, James H. Mulligan Jr.