| 2013 | DATE | Memory array protection: check on read or check on write? | Panagiota Nikolaou, Yiannakis Sazeides, Lorena Ndreu, Emre zer, Sachin Idgunji |
| 2013 | MICRO | Implicit-storing and redundant-encoding-of-attribute information in error-correction-codes. | Yiannakis Sazeides, Emre zer, Danny Kershaw, Panagiota Nikolaou, Marios Kleanthous, Jaume Abella |
| 2011 | ISLPED | Eliminating energy of same-content-cell-columns of on-chip SRAM arrays. | Bushra Ahsan, Lorena Ndreu, Isidoros Sideris, Yiannakis Sazeides, Sachin Idgunji, Emre zer |
| 2009 | ISLPED | Way guard: a segmented counting bloom filter approach to reducing energy for set-associative caches. | Mrinmoy Ghosh, Emre zer, Simon Ford, Stuart Biles, Hsien-Hsin S. Lee |
| 2007 | SBAC-PAD | Low-cost Techniques for Reducing Branch Context Pollution in a Soft Realtime Embedded Multithreaded Processor. | Emre zer, Alastair Reid, Stuart Biles |
| 2006 | CASES | Reducing energy of virtual cache synonym lookup using bloom filters. | Dong Hyuk Woo, Mrinmoy Ghosh, Emre zer, Stuart Biles, Hsien-Hsin S. Lee |
| 2004 | CC | Stochastic Bit-Width Approximation Using Extreme Value Theory for Customizable Processors. | Emre zer, Andy Nisbet, David Gregg |
| 2004 | EuroPar | Automatic Customization of Embedded Applications for Enhanced Performance and Reduced Power Using Optimizing Compiler Techniques. | Emre zer, Andy Nisbet, David Gregg |
| 2004 | FCCM | Fine-Tuning Loop-Level Parallelism for Increasing Performance of DSP Applications on FPGAs. | Emre zer, Andy Nisbet, David Gregg |
| 2001 | HiPC | Weld: A Multithreading Technique Towards Latency-Tolerant VLIW Processors. | Emre zer, Thomas M. Conte, Saurabh Sharma |
| 1998 | MICRO | Unified Assign and Schedule: A New Approach to Scheduling for Clustered Register File Microarchitectures. | Emre zer, Sanjeev Banerjia, Thomas M. Conte |