Enshan Yang
Publication record assembled from the DBLP archive of ranked conferences.
Papers indexed
2
Venues
2
Active years
2013–2025
Best venue rank
A
Where they publish
Papers
2 indexed papers, newest first.
| Year | Venue | Title | Authors |
|---|---|---|---|
| 2025 | FPGA | DPUV4E: High-Throughput DPU Architecture Design for CNN on Versal ACAP. | Guoyu Li, Pengbo Zheng, Jian Weng, Enshan Yang |
| 2013 | IOLTS | HHC: Hierarchical hardware checkpointing to accelerate fault recovery for SRAM-based FPGAs. | Enshan Yang, Keheng Huang, Yu Hu, Xiaowei Li, Jian Gong, Hongjin Liu, Bo Liu |