Eric Liau
Publication record assembled from the DBLP archive of ranked conferences.
Papers indexed
5
Venues
4
Active years
2003–2008
Best venue rank
A
Where they publish
Papers
5 indexed papers, newest first.
| Year | Venue | Title | Authors |
|---|---|---|---|
| 2008 | ITC | Efficient High-Speed Interface Verification and Fault Analysis. | Thomas Nirmaier, Jose Torres Zaguirre, Eric Liau, Wolfgang Spirkl, Armin Rettenberger, Doris Schmitt-Landsiedel |
| 2006 | ISCAS | A 1.8V p(seudo)SRAM using standard 140nm DRAM technology with self adapting clocked standby operation. | Thomas Janik, Eric Liau, Harald Lorenz, Manfred Menke, Eckehard Plaettner, Joerg Schweden, Helmut Seitz, Esther Vega-Ordonez |
| 2005 | DATE | Computational Intelligence Characterization Method of Semiconductor Device. | Eric Liau, Doris Schmitt-Landsiedel |
| 2005 | ITC | Computational intelligence based testing for semiconductor measurement systems. | Eric Liau, Doris Schmitt-Landsiedel |
| 2003 | ETS | Automatic worst case pattern generation using neural networks & genetic algorithm for estimation of switching noise on power supply lines in CMOS circuits. | Eric Liau, Doris Schmitt-Landsiedel |