Skip to content

Eric S. Chung

Publication record assembled from the DBLP archive of ranked conferences.

Papers indexed

18

Venues

6

Active years

2008–2023

Best venue rank

A*

Where they publish

Papers

18 indexed papers, newest first.

YearVenueTitleAuthors
2023ISCAWith Shared Microexponents, A Little Shifting Goes a Long Way.Bita Darvish Rouhani, Ritchie Zhao, Venmugil Elango, Rasoul Shafipour, Mathew Hall, Maral Mesmakhosroshahi, Ankit More, Levi Melnick, Maximilian Golub, Girish Varatkar, Lai Shao, Gaurav Kolhe, Dimitry Melts, Jasmine Klar, Renee L'Heureux, Matt Perry, Doug Burger, Eric S. Chung, Zhaoxia (Summer) Deng, Sam Naghshineh, Jongsoo Park, Maxim Naumov
2018ISCAA Configurable Cloud-Scale DNN Processor for Real-Time AI.Jeremy Fowers, Kalin Ovtcharov, Michael Papamichael, Todd Massengill, Ming Liu, Daniel Lo, Shlomi Alkalay, Michael Haselman, Logan Adams, Mahdi Ghandi, Stephen Heil, Prerak Patel, Adam Sapek, Gabriel Weisz, Lisa Woods, Sitaram Lanka, Steven K. Reinhardt, Adrian M. Caulfield, Eric S. Chung, Doug Burger
2018NSDIAzure Accelerated Networking: SmartNICs in the Public Cloud.Daniel Firestone, Andrew Putnam, Sambrama Mundkur, Derek Chiou, Alireza Dabagh, Mike Andrewartha, Hari Angepat, Vivek Bhanu, Adrian M. Caulfield, Eric S. Chung, Harish Kumar Chandrappa, Somesh Chaturmohta, Matt Humphrey, Jack Lavier, Norman Lam, Fengfen Liu, Kalin Ovtcharov, Jitu Padhye, Gautham Popuri, Shachar Raindel, Tejas Sapre, Mark Shaw, Gabriel Silva, Madhan Sivakumar, Nisheeth Srivastava, Anshuman Verma, Qasim Zuhair, Deepak Bansal, Doug Burger, Kushagra Vaid, David A. Maltz, Albert G. Greenberg
2016FPGAAgile Co-Design for a Reconfigurable Datacenter.Shlomi Alkalay, Hari Angepat, Adrian M. Caulfield, Eric S. Chung, Oren Firestein, Michael Haselman, Stephen Heil, Kyle Holohan, Matt Humphrey, Tams Juhsz, Puneet Kaur, Sitaram Lanka, Daniel Lo, Todd Massengill, Kalin Ovtcharov, Michael Papamichael, Andrew Putnam, Raja Seera, Rimon Tadros, Jason Thong, Lisa Woods, Derek Chiou, Doug Burger
2016MICROA cloud-scale acceleration architecture.Adrian M. Caulfield, Eric S. Chung, Andrew Putnam, Hari Angepat, Jeremy Fowers, Michael Haselman, Stephen Heil, Matt Humphrey, Puneet Kaur, Joo-Young Kim, Daniel Lo, Todd Massengill, Kalin Ovtcharov, Michael Papamichael, Lisa Woods, Sitaram Lanka, Derek Chiou, Doug Burger
2014FCCMA High Memory Bandwidth FPGA Accelerator for Sparse Matrix-Vector Multiplication.Jeremy Fowers, Kalin Ovtcharov, Karin Strauss, Eric S. Chung, Greg Stitt
2014ISCAA reconfigurable fabric for accelerating large-scale datacenter services.Andrew Putnam, Adrian M. Caulfield, Eric S. Chung, Derek Chiou, Kypros Constantinides, John Demme, Hadi Esmaeilzadeh, Jeremy Fowers, Gopi Prashanth Gopal, Jan Gray, Michael Haselman, Scott Hauck, Stephen Heil, Amir Hormati, Joo-Young Kim, Sitaram Lanka, James R. Larus, Eric Peterson, Simon Pope, Aaron Smith, Jason Thong, Phillip Yi Xiao, Doug Burger
2013FCCMReconfigurable computing in the era of post-silicon scaling [panel discussion].Eric S. Chung, Doug Burger, Mike Butts, Jan Gray, Chuck Thacker, Kees A. Vissers, John Wawrzynek
2013FCCMShrinkWrap: Compiler-Enabled Optimization and Customization of Soft Memory Interconnects.Eric S. Chung, Michael Papamichael
2013FPGATowards automatic customization of interconnect and memory in the CoRAM abstraction (abstract only).Eric S. Chung, Michael Papamichael
2013FPGACross-platform FPGA accelerator development using CoRAM and CONNECT.Eric S. Chung, Michael Papamichael, Gabriel Weisz, James C. Hoe
2013ISCALINQits: big data on little clients.Eric S. Chung, John D. Davis, Jaewon Lee
2012FCCMTowards a Universal FPGA Matrix-Vector Multiplication Architecture.Srinidhi Kestur, John D. Davis, Eric S. Chung
2012FPGAPrototype and evaluation of the CoRAM memory architecture for FPGA-based computing.Eric S. Chung, Michael Papamichael, Gabriel Weisz, James C. Hoe, Ken Mai
2011FPGACoRAM: an in-fabric memory architecture for FPGA-based computing.Eric S. Chung, James C. Hoe, Ken Mai
2010MICROSingle-Chip Heterogeneous Computing: Does the Future Include Custom Logic, FPGAs, and GPGPUs?Eric S. Chung, Peter A. Milder, James C. Hoe, Ken Mai
2009MEMOCODEImplementing a high-performance multithreaded microprocessor: A case study in high-level design and validation.Eric S. Chung, James C. Hoe
2008FPGAA complexity-effective architecture for accelerating full-system multiprocessor simulations using FPGAs.Eric S. Chung, Eriko Nurvitadhi, James C. Hoe, Babak Falsafi, Ken Mai