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Ettore Napoli

Publication record assembled from the DBLP archive of ranked conferences.

Papers indexed

16

Venues

3

Active years

2000–2025

Best venue rank

C

Where they publish

Papers

16 indexed papers, newest first.

YearVenueTitleAuthors
2025ISCASA novel approximate multiplier based on improved logarithmic and antilogarithmic conversions.Gennaro Di Meo, Davide De Caro, Luca Tegazzini, Ettore Napoli, Antonio G. M. Strollo
2024ISCASComprehensive Analysis of Input Order Invariant Approximate 4-2 Compressors for Binary Multipliers.Ettore Napoli, Antonio G. M. Strollo, Efstratios Zacharelos, Gennaro Di Meo
2022ARITHApproximate Recursive Multipliers Using Low Power Building Blocks.Efstratios Zacharelos, Italo Nunziata, Gerardo Saggese, Antonio G. M. Strollo, Ettore Napoli
2020ISCASA Binary Line Buffer Circuit Featuring Lossy Data Compression at Fixed Maximum Data Rate.Ettore Napoli, Davide De Caro, Nicola Petra, Antonio G. M. Strollo
2020ISCASLow-Power Approximate Multiplier with Error Recovery using a New Approximate 4-2 Compressor.Antonio G. M. Strollo, Davide De Caro, Ettore Napoli, Nicola Petra, Gennaro Di Meo
2018ISCASOn the Use of Approximate Multipliers in LMS Adaptive Filters.Darjn Esposito, Gennaro Di Meo, Davide De Caro, Nicola Petra, Ettore Napoli, Antonio G. M. Strollo
2017ISCASOn the use of approximate adders in carry-save multiplier-accumulators.Darjn Esposito, Davide De Caro, Ettore Napoli, Nicola Petra, Antonio G. M. Strollo
2016ISCASApproximate adder with output correction for error tolerant applications and Gaussian distributed inputs.Darjn Esposito, Gerardo Castellano, Davide De Caro, Ettore Napoli, Nicola Petra, Antonio G. M. Strollo
2016ISCASComparative analysis of differential colpitts and cross-coupled VCOs in 180 nm Si-Ge HBT technology.Valerio Marotta, Giuseppe Macera, Michael Peter Kennedy, Ettore Napoli
2015ISCASThe noise and spur delusion in fractional-N frequency synthesizer design.Michael Peter Kennedy, Hongjia Mo, Zhida Li, Guosheng Hu, Paolo Scognamiglio, Ettore Napoli
2015ISCASAn FPGA processor for real-time, fixed-point refinement of CDVS keypoints.Giorgio Lopez, Ettore Napoli, Domenico Meglio, Antonio G. M. Strollo
2014ISCASFPGA based system for the generation of noise with programmable power spectrum.Ettore Napoli, Mauro D'Arco, Pasquale Di Cosmo, Mariangela Genovese, Antonio G. M. Strollo
2010ISCASHigh-speed differential resistor ladder for A/D converters.Davide De Caro, Marino Coppola, Nicola Petra, Ettore Napoli, Antonio G. M. Strollo, Valeria Garofalo
2010ISCASA novel truncated squarer with linear compensation function.Valeria Garofalo, Marino Coppola, Davide De Caro, Ettore Napoli, Nicola Petra, Antonio G. M. Strollo
2010ISCASFixed-width CSD multipliers with minimum mean square error.Nicola Petra, Davide De Caro, Antonio G. M. Strollo, Valeria Garofalo, Ettore Napoli, Marino Coppola, Pietro Todisco
2000ISLPEDNew clock-gating techniques for low-power flip-flops.Antonio G. M. Strollo, Ettore Napoli, Davide De Caro